Infineon CYT2B6

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The Infineon CYT2B6 (TVII-B-E-512K) is a subfamily of the Infineon Traveo T2G microcontrollers containing a Cortex M4 and Cortex M0+ CPU.


The CYT2B6 family features 64 KB of SRAM located at 0x08000000. The first 2 KB are reserved for internal usage and may not be used.

Flash memory layout

The CYT2B6 series devices have 576 KiB Code flash and a 64 KiB Work flash. Both flashes are split in an area of large sectors and an area of small sectors.

Flash Start adress End adress Sector size Sector count Total size
Code flash large area 0x10000000 0x1006FFFF 32 KiB 14 448 KiB
Code flash small area 0x10070000 0x1008FFFF 8 KiB 16 128 KiB
Work flash large area 0x14000000 0x1400BFFF 2 KiB 24 48 KiB
Work flash small area 0x1400C000 0x1400FFFF 128 B 128 16 KiB
For information regarding Supervisory Flash (SFlash), please refer to Infineon Traveo T2G article

Example Application

The following example projects were created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the CYTVII-B-E-1M-100-CPU Rev. 1.0 board with CYT2B65BADES MCU inside. It is a simple Hello World sample linked into the internal flash.