J-Link PLUS V11

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This page contains the general, mechanical and electrical specifications as well as an overview of supported soft- and hardware features of the SEGGER J-Link PLUS V11.

Hardware Features

Feature Supported
USB 2.0 Full Speed YES.png
USB 2.0 Hi-Speed YES.png
WinUSB YES.png
JTAG interface YES.png
cJTAG interface YES.png
cJTAG interface without/buggy KEEPER logic YES.png
SWD interface YES.png
SWO interface YES.png
SPI interface YES.png
QSPI interface NO.png
Microchip ICSP interface YES.png
Renesas FINE interface YES.png
SiLabs C2 2-wire interface YES.png
ETB Trace ARM7/9 YES.png
ETB Trace Cortex-M YES.png
ETB Trace Cortex-A/R YES.png
ETM Trace Cortex-M NO.png
Memory Stop mode support YES.png
Cortex-M Monitor Mode debugging NO.png
SWD Multi-Drop YES.png
CMSIS-DAP mode YES.png

Supported cores

J-Link provides debugging support for the following cores.

If you are interested in J-Link support for a core that is not listed here, please feel free to request support via the SEGGER support ticket system.
Arm China cores
Star YES.png
Arm Cortex cores
Cortex-A5 YES.png
Cortex-A7 YES.png
Cortex-A8 YES.png
Cortex-A9 YES.png
Cortex-A12 YES.png
Cortex-A15 YES.png
Cortex-A17 YES.png
Cortex-A32 YES.png
Cortex-A35 YES.png
Cortex-A53 YES.png
Cortex-A55 YES.png
Cortex-A57 YES.png
Cortex-A72 YES.png
Cortex-R4 YES.png
Cortex-R5 YES.png
Cortex-R7 YES.png
Cortex-R8 YES.png
Cortex-R52 YES.png
Cortex-M0 YES.png
Cortex-M0+ YES.png
Cortex-M1 YES.png
Cortex-M3 YES.png
Cortex-M4 YES.png
Cortex-M7 YES.png
Cortex-M23 YES.png
Cortex-M33 YES.png
Cortex-M55 YES.png
Cortex-M85 YES.png
Arm (legacy) cores
ARM720T YES.png
ARM920T YES.png
ARM922T YES.png
ARM926EJ-S YES.png
ARM946E-S YES.png
ARM966E-S YES.png
ARM1136JF-S YES.png
ARM1136J-S YES.png
ARM1156T2-S YES.png
ARM1156T2F-S YES.png
ARM1176JZ-S YES.png
ARM1176JZF YES.png
ARM1176JZF-S YES.png
Cadence Tensilica cores
HiFi 1 YES.png
HiFi 3 YES.png
HiFi 3z YES.png
HiFi 4 YES.png
Fusion F1 YES.png
Xtensa LX6 YES.png
Xtensa LX7 YES.png
Microchip PIC cores
Microchip PIC32MX YES.png
Microchip PIC32MZ YES.png
Microchip PIC32WK YES.png
Renesas RX cores
RX110 YES.png
RX111 YES.png
RX113 YES.png
RX130 YES.png
RX13T YES.png
RX140 YES.png
RX210 YES.png
RX21A YES.png
RX220 YES.png
RX231 YES.png
RX23T YES.png
RX24T YES.png
RX610 YES.png
RX621 YES.png
RX62G YES.png
RX62N YES.png
RX62T YES.png
RX630 YES.png
RX631 YES.png
RX63N YES.png
RX63T YES.png
RX64M YES.png
RX65N YES.png
RX651 YES.png
RX660 YES.png
RX66T YES.png
RX71M YES.png
RX72M YES.png
RX72N YES.png
RX72T YES.png
AndesTech (RISC-V) cores
A25 YES.png
A25MP YES.png
A27 YES.png
A27L2 YES.png
A45 YES.png
A45MP YES.png
D25F YES.png
D45 YES.png
N22 YES.png
N25 YES.png
N25F YES.png
N45 YES.png
AX25 YES.png
AX25MP YES.png
AX27 YES.png
AX27L2 YES.png
AX45 YES.png
AX45MP YES.png
NX25F YES.png
NX27V YES.png
NX45 YES.png
Codasip (RISC-V) cores
L10 YES.png
L11 YES.png
L30 YES.png
L31 YES.png
L31F YES.png
L30F YES.png
L50 YES.png
L50F YES.png
H50X YES.png
H50XF YES.png
Nuclei Systems (RISC-V) cores
N101 YES.png
N203 YES.png
N203E YES.png
N205 YES.png
N208 YES.png
N305 YES.png
N307 YES.png
N308 YES.png
N605 YES.png
N607 YES.png
N608 YES.png
N900 YES.png
N900MP YES.png
NX605 YES.png
NX607 YES.png
NX608 YES.png
NX900 YES.png
NX900MP YES.png
UX605 YES.png
UX607 YES.png
UX608 YES.png
UX900 YES.png
UX900MP YES.png
SiFive (RISC-V) cores
E20 YES.png
E21 YES.png
E24 YES.png
E31 YES.png
E34 YES.png
E61 YES.png
E61-MC YES.png
E76 YES.png
E76-MC YES.png
P270 YES.png
P550 YES.png
S21 YES.png
S51 YES.png
S54 YES.png
S61 YES.png
S61-MC YES.png
S76 YES.png
S76-MC YES.png
U54 YES.png
U54-MC YES.png
U64 YES.png
U64-MC YES.png
U74 YES.png
U74-MC YES.png
X280 YES.png
X280-MC YES.png
RISC-V cores misc.
CloudBEAR BM-310 YES.png
Syntacore SCR1 YES.png
Syntacore SCR3 YES.png
CloudBEAR BM-610 YES.png
Silicon Labs 8051 cores
EFM8 YES.png

Interface speeds

Interface Max. speed
VCOM 115200 Bd [1]

[1] The max. baudrate for J-Link depends on the configured Eco mode:

Eco mode Max. baudrate
Normal 115200 Bd
Eco 57600 Bd
Eco Plus 28800 Bd
Eco Max 28800 Bd


Specification Value
Supported OS Microsoft Windows (x86/x64), Linux (x86/x64/Arm), macOS (x86)
Electromagnetic compatibility (EMC) EN 55022, EN 55024
Operating temperature +5°C ... +60°C
Storage temperature -20°C ... +65 °C
Relative humidity (non-condensing) Max. 90% rH
Size (without cables) 100mm x 53mm x 27mm
Weight (without cables) 70g
Available interfaces
USB interface USB 2.0 (Hi-Speed); USB Type B
Target interface JTAG 20-pin (14-pin and other adapters available)
JTAG/SWD Interface, Electrical
Power supply USB powered Max. 50mA + Target Supply current.
Target interface voltage (VIF) 1.2V ... 5V
Target supply voltage 5V (derived from USB voltage)
Target supply current Max. 300mA
Reset Type Open drain. Can be pulled low or tristated.
Reset low level output voltage (VOL) VOL <= 10% of VIF
For the whole target voltage range (1.2V <= VIF <= 5V)
LOW level input voltage (VIL) VIL <= 40% of VIF
HIGH level input voltage (VIH) VIH >= 60% of VIF
For 1.2V <= VIF <= 3.6V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 20% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 80% of VIF
For 3.6 <= VIF <= 5V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 20% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 80% of VIF
JTAG/SWD Interface, Timing
Target interface speed Max. 15 MHz
SWO sampling frequency Max. 30 MHz
Data input rise time (Trdi) Trdi <= 20ns
Data input fall time (Tfdi) Tfdi <= 20ns
Data output rise time (Trdo) Trdo <= 10ns
Data output fall time (Tfdo) Tfdo <= 10ns
Clock rise time (Trc) Trc <= 3ns
Clock fall time (Tfc) Tfc <= 3ns