NXP KW45

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The NXP KW45 are multicore devices composed of one Cortex-M33 and one Cortex-M3. Currently J-Link supports the Cortex-M33.

Internal Flash

Supported Regions

The internal flash is divided into two different regions: Non-Secure/Secure flash and NBU flash.

Flash bank Base address Size (KB)
Non-secure flash 0x00000000 KW45x41x5x: 512
KW45x41x8x: 1024
Secure flash 0x10000000 KW45x41x5x: 512
KW45x41x8x: 1024
NBU flash 0x48800000 256

Reset

J-Link supports a reset for the following use cases:

  • No valid flash image in non-secure flash region
  • Valid flash region in non-secure flash region

ECC RAM

The STCM has ECC enabled so needs to be properly initialized before any read operation to avoid any code runaway or software malfucntion or core lockup. The following memory ranges are initialized by the J-Link on connect by default. Other ranges needs to be initialized by the application / boot ROM.

Memory Address Size
STCM 0x30004000 32 KB

Limitations

Attach

Attach is not supported by default because the J-Link initializes certain RAM regions by default.

Other cases (e.g. valid flash image in secure flash region) are currently not supported.

NBU flash

For program/erase of the NBU flash, it must be accessible from CM33.

Thus, the device must be in a according lifecycle state.

Refer to the device reference manual for more information.

Evaluation Boards

Example Application