RTT Ramcode Sample for Cortex-M0+ (Keil MDK)
This article describes how to get started with RTT within RAM on a Cortex-M0+ device. This article assumes that there is already a basic knowledge about RTT in general (what is RTT, etc.). If this is not the case, we recommend to read RTT chapter in the J-Link User Manual (UM08001).
In order to use ETB trace on the ATMEL ATSAMD21 devices, the following minimum requirements have to be met:
- J-Link software version V6.44g or later
- µVision V126.96.36.199 or later (if the sample project from below shall be used)
- J-Link Plus HW version V10.1 or later
The following sample project is designed to be used with J-Link and Keil MDK to demonstrate RTT. The project has been tested with the minimum requirements mentioned above and a SAMD21 XPlained Pro evalboard. The sample project comes with a pre-configured project for Keil MDK that runs out-of-the box.
- After downloading and unzipping the project, open it with Keil µVision V188.8.131.52 or later.
- Remark: When using another Cortex M0+ device with different RAM sections, adapt the RAM sections accordingly in the Keil project settings:
- Build(F7) the project and start debugging by clicking on the Debug button (Ctrl + F5)
- Start RTT Viewer and connect with the following settings:
- Running the ramcode (F5) in Keil results in the following output in RTT viewer: