Renesas ASSP EASY

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The Renesas ASSP easy are RISC-V based microcontrollers.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Code Flash 0x00000000 up to 128 KB YES.png
Config Flash 0x01010008 up tp 44 B YES.png
Data Flash 0x40100000 up to 4 KB YES.png

ECC RAM

  • Device has ECC RAM which has to be initialized before use.

Watchdog Handling

  • The device has 2 watchdogs.
  • Both watchdogs are fed during flash programming.

Device Specific Handling

Connect

  • On Connect, the RAM is initialized.

Reset

  • The device uses normal RISC-V reset, no special handling necessary, like described here.

Limitations

Attach

Attach is not supported by default because the J-Link initializes certain RAM regions by default.

Evaluation Boards

Example Application