Renesas RA6E1
Contents
The Renesas RA6E1 series are microcontrollers based on the ARM Cortex-M33 core.
Flash
Internal option-setting memory
Option-settings memory is located at 0x0100A100 has a size of 512 Bytes.
Internal program flash
The size of the program flash is dependent on the device used.
Device | Size (KiB) | Memory region |
---|---|---|
R7FA6E10D | 512 | 0x00000000 - 0x0007FFFF |
R7FA6E10F | 1024 | 0x00000000 - 0x000FFFFF |
Currently only single bank flash operations are supported. Dual bank mode is not supported.
Internal data flash
Internal data flash is located at 0x08000000 has a size of 8 KB.
External QSPI flash
External QSPI flash is located at 0x60000000.
Supported pin configurations
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
- CLK@P305_nCS@P306_D0@P307_D1@P503_D2@P104_D3@P505 (default)
- CLK@P500_nCS@P501_D0@P502_D1@P503_D2@P504_D3@P505
- CLK@P305_nCS@P306_D0@P307_D1@P308_D2@P309_D3@P310
TrustZone
Flash programming with TrustZone enabled is supported (DLM state SSD and NSECSD). Whether the RAMCode is usable depends on the "Device Lifecycle Managment" state (DLM). In the NSECSD state only the RAMless flashloader can be used. This is a technical limitation. The J-Link software is not able to decide at runtime when to use the RAMCode or RAMless flashloader. If you want to use the RAMless flashloader, you have to add "_RAMLess" to the device name, e.g. use "R7FA6E10F_RAMLess" instead of "R7FA6E10F". Please note that a significantly lower programming speed has to be expected with the RAMless flashloader.
Evaluation Boards
- Renesas FPB-RA6E1: https://wiki.segger.com/Renesas_FPB-RA6E1