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This article describes device specifics of the ST STM32F1 series devices.

Option Byte Programming in J-Flash

J-Flash supports programming of the option bytes for STM32 devices. In order to program the option bytes simply choose the appropriate Device, which allows option byte programming, in the CPU settings tab (e.g. STM32F103ZE (allow opt. bytes) ). J-Flash will allow programming a virtual 16-byte sector at address 0x06000000 which represents the 8 option bytes and their complements. You do not have to care about the option bytes’ complements since they are computated automatically. The following table describes the structure of the option bytes sector:

Address [31:24] [23:16] [15:08] [07:00]
0x06000000 complement Option byte 1 complement Option byte 0
0x06000004 complement Option byte 3 complement Option byte 2
0x06000008 complement Option byte 5 complement Option byte 4
0x0600000C complement Option byte 7 complement Option byte 6

Note: Writing a value of 0xFF inside option byte 0 will read-protect the STM32. In order to keep the device unprotected you have to write the key value 0xA5 into option byte 0.

Note: The address 0x06000000 is a virtual address only. The option bytes are originally located at address 0x1FFFF800. The remap from 0x06000000 to 0x1FFFF800 is done automatically by J-Flash.


To program the option bytes 2 and 3 with the values 0xAA and 0xBB, but leave the device unprotected your option byte sector (at addr 0x06000000) should look like as follows:

Address [31:24] [23:16] [15:08] [07:00]
0x06000000 0x00 0xFF 0x5A 0xA5
0x06000004 0x44 0xBB 0x55 0xAA
0x06000008 0x00 0xFF 0x00 0xFF
0x0600000C 0x00 0xFF 0x00 0xFF

For a detailed description of each option byte, please refer to ST programming manual PM0042, section "Option byte description".

Securing/unsecuring the device

Please refer to the generic wiki-article:

Hardware watchdog

The hardware watchdog of a STM32F10x device can be enabled by programming the option bytes. If the hardware watchdog is enabled the device is reset periodically if the watchdog timer is not refreshed and reaches 0. If the hardware watchdog is enabled by an application which is located in flash and which does not refresh the watchdog timer, the device can not be debugged anymore.

Disabling the hardware watchdog

In order to disable the hardware watchdog the option bytes have to be re-programmed. SEGGER offers a free command line tool which reprograms the option bytes in order to disable the hardware watchdog. For more information about the STM32 commander, please refer to the J-Link User Manual (UM08001).

Debugging with software watchdog enabled

If the device shall be debugged with one of the software watchdogs (independed watchdog / window watchdog) enabled, there is an additional init step necessary to make the watchdog counter stop when the CPU is halted by the debugger. This is configured in the DBGMCU_CR register. The following sequence can be used to enable debugging with software watchdogs enabled:

// Configure both watchdog timers to be halted if the CPU is halted by the debugger
*((volatile int *)(0xE0042004)) |= (1 << 8) | (1 << 9);