SiFive HiFive1

From SEGGER Wiki
Jump to: navigation, search

The SiFive HiFive1 is an evaluation board with a SiFive FE310 MCU (RISC-V). It comes with a on board J-Link (OB).

Debugging via external debugger

The SiFive HiFive1 REV.B comes with a 9-pin Cortex-M compliant debug header, but it is not recommended to use it as explained in the following section.

Complications

The board was designed to be mainly be used with the J-Link OB. This leads to certain difficulties:
The J-Link OB comes with Drag&Drop support which means that certain information must be retrieved on power-on. To prevent external interruption the external debug pins are locked.

Note:
As the board does not provide jumpers to cut off the J-Link OB uninvasively, there is no good way to debug the board via the external debug header.

Work around (not recommended!)

The user can connect to the J-Link OB (e.g. with J-Link Commander) and disconnect this session again. This will release the lock of the external debug header pins.
HOWEVER: The operating system might request information from the J-Link OB about the MSD state at any undefined time. In such a case, the J-Link OB might require to communicate with the device, interfering with the ongoing external debug communication. This will result in unpredictable behavior, which is the reason why this workaround is not recommended.