The TI MSPM0G are Cortex-M0 based micro controllers.
The internal flash is divided into 3 different regions:
|Region name||Range (max)||Programmable||Supported by J-Link|
|MAIN||0x0000_0000 - 0x0020_0000|
|NONMAIN||0x41C0_0000 - 0x41C0_0200|||
|FACTORY||0x41C4_0000 - 0x41C4_0080|
- See NONMAIN
The flash is ECC protected.
- When programming code with J-Link, the device flash controller is set to automatically program the correct ECC values.
- Manual ECC programming is currently not supported by J-Link.
Erased value and Blank Check
- The erased value of the TI MSPM0x devices is non-deterministic. This means that there is no specific erased value for erased flash.
- The device's flash controller will automatically blank check when erasing.
Therefore, blank check via J-Link Software is disabled.
The NONMAIN region is supported by J-Link for programming. However, the NONMAIN holds boot configuration data and therefore must be programmed with extreme care:
- Changes of the NONMAIN region take effect after the next hard reset / power cycle.
- The device can be locked (non-)permanently by writing NONMAIN.
- If the CRC of the BCR and/or BSL blocks are not matching the related data, the device is permanently locked.
- Erasing this region will lead to a non-matching CRC, thus locking the device permanently.
The MSPM0G devices have two windowed watchdogs implemented (WWDG).
Apparently, the watchdog counter cannot be read directly.
For this reason flash programming is only supported for devices where the watchdogs are not running in window mode.
Supported watchdog settings:
- Enabled (non-window mode)
For these devices, the Cortex-M default reset is used.