Tracing on NXP S32K148

From SEGGER Wiki
Jump to: navigation, search

This article describes how to get started with trace on the NXP S32K148 MCU. This article assumes that there is already a basic knowledge about trace in general (what is trace, what different implementations of trace are there, etc.). If this is not the case, we recommend to read Trace chapter in the J-Link User Manual (UM08001). The NXP S32K148 MCU implements tracing via pins , so a J-Trace can be used for tracing.

Minimum requirements

In order to use trace on the NXP S32K148 MCU devices, the following minimum requirements have to be met:

  • J-Link software version V6.46f or later
  • Ozone V2.62e or later (if streaming trace and / or the sample project from below shall be used)
  • J-Trace PRO for Cortex-M HW version V1.0 or later
  • Tracepin connection like on the S32K148EVB eval board (See Specifics/Limitations for more information)

Sample project

Streaming trace

The following sample project is designed to be used with J-Trace PRO and Ozone to demonstrate streaming trace. The project has been tested with the minimum requirements mentioned above and a S32K148EVB board. The sample project comes with a pre-configured project file for Ozone that runs out-of-the box. In order to rebuild the sample project, SEGGER Embedded Studio can be used.

NXP_S32K148_Trace_Example.zip

Note: The example is shipped with a compiled .JLinkScriptfile, should you need the original source it can be requested at support@segger.com

Specifics/Limitations

This eval board showed some signal integrity issues with 4-bit trace thus only 2-bit are enabled in the example projects for a stable trace experience. Should you be creating your own trace design we recommend the following: keep the trace wires short, keep them at the same length, do not share them with other peripherals and do not to attach any components to the trace lanes that might impact the timing behaviour of high frequency signals like capacitors, diodes, inductors etc..

Tested Hardware

S32K148EVB

Reference trace signal quality

The following pictures show oscilloscope measurements of trace signals output by the "Tested Hardware" using the example project. All measurements have been performed using a Agilent InfiniiVision DSO7034B 350 MHz 2GSa/s oscilloscope and 1156A 1.5 GHz Active Probes. If your trace signals look similar on your trace hardware, chances are good that tracing will work out-of-the-box using the example project. More information about correct trace timing can be found at the following website.

Trace clock signal quality

The trace clock signal quality shows multiple trace clock cycles on the tested hardware as reference.

Trace clock signal quality

Rise time

The rise time of a signal shows the time needed for a signal to rise from logical 0 to logical 1. For this the values at 10% and 90% of the expected voltage level get used as markers. The following picture shows such a measurement for the trace clock signal.

TCLK rise time

Setup time

The setup time shows the relative setup time between a trace data signal and trace clock. The measurement markers are set at 50% of the expected voltage level respectively. The following picture shows such a measurement for the trace data signal 0 relative to the trace clock signal.

TD0 setup time