Tracing on ST STM32L552
This article describes how to get started with trace on the ST STM32L552 MCU. This article assumes that there is already a basic knowledge about trace in general (what is trace, what different implementations of trace are there, etc.). If this is not the case, we recommend to read Trace chapter in the J-Link User Manual (UM08001). The ST STM32L552 MCU implements tracing via pins , so a J-Trace can be used for tracing.
In order to use trace on the ST STM32L552 MCU devices, the following minimum requirements have to be met:
- J-Link software version V6.44g or later
- Ozone V2.62a or later (if streaming trace and / or the sample project from below shall be used)
- J-Trace PRO for Cortex-M HW version V1.0 or later
The following sample project is designed to be used with J-Trace PRO and Ozone to demonstrate streaming trace. The project has been tested with the minimum requirements mentioned above. The sample project comes with a pre-configured project file for Ozone that runs out-of-the box. In order to rebuild the sample project, SEGGER Embedded Studio can be used.
Note: The examples are shipped with a compiled .JLinkScriptfile, should you need the original source it can be requested at email@example.com
How to create your own JLinkScript is explained here: https://wiki.segger.com/How_to_configure_JLinkScript_files_to_enable_tracing
Currently there are no eval boards available for this particular device as a reference design, make sure to take certain design considerations into account. Try to design the trace lanes as short as possible and make them approximately the same length from MCU to trace header. Do not connect any party to the trace lanes that might impact the timing behaviour of high frequency signals (capacitors, diodes or inductors). A recommend design reference are our Trace Reference Boards.
This particular target device allows several pin pairs to be used for tracing. To be able to use the example project from this article make sure the following pins are used for tracing:
- PE2 => TCLK
- PC9 => TD0
- PC10 => TD1
- PE5 => TD2
- PC12 => TD3