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2024-03-28T20:11:49Z
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https://wiki.segger.com/index.php?title=emCrypt&diff=17243
emCrypt
2023-12-09T23:52:17Z
<p>Paul: </p>
<hr />
<div>emCrypt is a secure and efficient implementation of essential cryptographic algorithms specifically designed for embedded systems.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/emcrypt product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ Cryptography benchmarks on real hardware<br />
|-<br />
! scope="col" | Benchmark<br />
! scope="col" | Device<br />
! scope="col" | Core<br />
! scope="col" | Speed<br />
! scope="col" | HW Accel<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| ECDSA sign and verify || STM32F072 || CM0 || 48 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F072|Results]]<br />
|-<br />
| ECDSA sign and verify || R7FS124 || CM0 || 24 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_R7FS124|Results]]<br />
|-<br />
| ECDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| ECDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[ECDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| EdDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| EdDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[EdDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| Hash algorithms || MK66FN2M0 || CM4 || 168 MHz || Yes || Run from flash, data in internal RAM || [[Hash_MK66FN2M0|Results]]<br />
|-<br />
| Hash algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[Hash_STM32F746|Results]]<br />
|-<br />
| Hash algorithms || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32F756|Results]]<br />
|-<br />
| Hash algorithms || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32H753|Results]]<br />
|-<br />
| Hash algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[Hash_AT91SAM9263|Results]]<br />
|-<br />
| MAC algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32F746|Results]]<br />
|-<br />
| MAC algorithms || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32FH753|Results]]<br />
|-<br />
| MAC algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[MAC_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[RSA_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || STM32F756 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32F756|Results]]<br />
|-<br />
| RSA (ModExp) || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32H753|Results]]<br />
|-<br />
| RSA (ModExp) || i.MX RT1176 || CM7 || 996 MHz || No || Run from flash, data in internal RAM || [[RSA_iMXRT1176|Results]]<br />
|-<br />
| RSA (ModExp) || GD32VW55 || RV32IMC || 160 MHz || No || Run from flash, data in internal RAM || [[RSA_GD32VW55 |Results]]<br />
|-<br />
| RNG + DRBG || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RNG_STM32H753|Results]]<br />
|-<br />
| Cipher (AES) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[AES_ATSAM9263|Results]]<br />
|-<br />
| Cipher (AES) || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32F756|Results]]<br />
|-<br />
| Cipher (AES) || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32H753|Results]]<br />
|-<br />
|}<br />
<br />
== FAQs ==<br />
<br />
=== For safety, my application cannot use a heap. How can I use emCrypt? ===<br />
<br />
All hashes, ciphers, MACs, and other simple cryptographic operations never require the use of a heap; such operations ''may'' use a ''context'' that the caller provides.<br />
<br />
Public key operations and signature algorithms (such as RSA, ECDSA, and EdDSA) and key agreement protocols based on integer factorization and elliptic curve cryptography (such as DH and ECDH) require an allocator. However, the allocator implementation is entirely under control of the caller and emCrypt never uses <code>malloc()</code> and <code>free()</code> internally.<br />
<br />
emCrypt ships with a set of memory allocators:<br />
<br />
* Use a fixed area of memory with dynamic block sizes.<br />
* Use a fixed area of memory with constant-size block sizes.<br />
* Use a fixed area of memory with power-of-two sizes that avoids fragmentation.<br />
* Use the system heap through <code>malloc()</code> and <code>free()</code> for e.g. desktop applications.<br />
<br />
All benchmarks demonstrate use of the emCrypt API using a fixed-size memory area and constant-size blocks avoiding use of any heap. Please refer to the emCrypt applications that ship in the product for examples of how to use fixed-size memory for API calls that require an allocator.</div>
Paul
https://wiki.segger.com/index.php?title=RSA_iMXRT1176&diff=17242
RSA iMXRT1176
2023-12-09T23:51:39Z
<p>Paul: Created page with " <nowiki>Copyright (c) 2014-2021 SEGGER Microcontroller GmbH www.segger.com Modular Exponentiation Benchmark compiled Dec 9 2023 23:44:05 Compiler: SEGGER cc 16.0.6 Syste..."</p>
<hr />
<div> <nowiki>Copyright (c) 2014-2021 SEGGER Microcontroller GmbH www.segger.com<br />
Modular Exponentiation Benchmark compiled Dec 9 2023 23:44:05<br />
<br />
Compiler: SEGGER cc 16.0.6<br />
System: Processor speed = 996.000 MHz<br />
Config: CRYPTO_VERSION = 24001 [2.40a]<br />
Config: CRYPTO_MPI_BITS_PER_LIMB = 32<br />
<br />
Modular Arithmetic Performance<br />
==============================<br />
<br />
CRT private key, exponent length = modulus length, all times in ms<br />
<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Modulus | 1024 bits | 2048 bits |<br />
| Algorithm | Time x Memory x | Time x Memory x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, fast | 16.23 1.00x 700 1.00x | 79.87 1.00x 1340 1.00x |<br />
| Basic, ladder | 18.93 0.86x 840 1.20x | 94.52 0.84x 1608 1.20x |<br />
| Basic, 2b, FW | 16.82 0.97x 1260 1.80x | 80.69 0.99x 2412 1.80x |<br />
| Basic, 3b, FW | 14.94 1.09x 1820 2.60x | 69.96 1.14x 3484 2.60x |<br />
| Basic, 4b, FW | 14.12 1.15x 2940 4.20x | 64.62 1.24x 5628 4.20x |<br />
| Basic, 5b, FW | 13.84 1.17x 5180 7.40x | 62.94 1.27x 9916 7.40x |<br />
| Basic, 6b, FW | 13.75 1.18x 9660 13.80x | 60.55 1.32x 18492 13.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, 2b, RM | 15.57 1.04x 1260 1.80x | 74.79 1.07x 2412 1.80x |<br />
| Basic, 3b, RM | 14.50 1.12x 1540 2.20x | 67.89 1.18x 2948 2.20x |<br />
| Basic, 4b, RM | 13.76 1.18x 2100 3.00x | 63.47 1.26x 4020 3.00x |<br />
| Basic, 5b, RM | 13.21 1.23x 3220 4.60x | 60.08 1.33x 6164 4.60x |<br />
| Basic, 6b, RM | 13.19 1.23x 5460 7.80x | 58.62 1.36x 10452 7.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, fast | 29.26 0.55x 980 1.40x | 150.28 0.53x 1876 1.40x |<br />
| Barrett, ladder | 39.75 0.41x 1120 1.60x | 247.43 0.32x 2144 1.60x |<br />
| Barrett, 2b, FW | 28.20 0.58x 1540 2.20x | 150.04 0.53x 2948 2.20x |<br />
| Barrett, 3b, FW | 28.60 0.57x 2100 3.00x | 129.44 0.62x 4020 3.00x |<br />
| Barrett, 4b, FW | 29.12 0.56x 3220 4.60x | 135.11 0.59x 6164 4.60x |<br />
| Barrett, 5b, FW | 29.61 0.55x 5460 7.80x | 129.21 0.62x 10452 7.80x |<br />
| Barrett, 6b, FW | 30.93 0.52x 9940 14.20x | 132.74 0.60x 19028 14.20x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, 2b, RM | 30.72 0.53x 1540 2.20x | 157.67 0.51x 2948 2.20x |<br />
| Barrett, 3b, RM | 31.65 0.51x 1820 2.60x | 132.47 0.60x 3484 2.60x |<br />
| Barrett, 4b, RM | 32.00 0.51x 2380 3.40x | 130.54 0.61x 4556 3.40x |<br />
| Barrett, 5b, RM | 30.66 0.53x 3500 5.00x | 130.38 0.61x 6700 5.00x |<br />
| Barrett, 6b, RM | 30.49 0.53x 5740 8.20x | 129.16 0.62x 10988 8.20x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, fast | 6.37 2.55x 700 1.00x | 36.24 2.20x 1340 1.00x |<br />
| Montgomery, ladder | 8.52 1.91x 840 1.20x | 47.97 1.67x 1608 1.20x |<br />
| Montgomery, 2b, FW | 6.42 2.53x 1260 1.80x | 36.08 2.21x 2412 1.80x |<br />
| Montgomery, 3b, FW | 5.77 2.81x 1820 2.60x | 32.23 2.48x 3484 2.60x |<br />
| Montgomery, 4b, FW | 5.51 2.94x 2940 4.20x | 30.53 2.62x 5628 4.20x |<br />
| Montgomery, 5b, FW | 5.47 2.97x 5180 7.40x | 29.78 2.68x 9916 7.40x |<br />
| Montgomery, 6b, FW | 5.69 2.85x 9660 13.80x | 30.14 2.65x 18492 13.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, 2b, RM | 6.01 2.70x 1260 1.80x | 33.32 2.40x 2412 1.80x |<br />
| Montgomery, 3b, RM | 5.72 2.84x 1540 2.20x | 31.35 2.55x 2948 2.20x |<br />
| Montgomery, 4b, RM | 5.51 2.94x 2100 3.00x | 30.09 2.65x 4020 3.00x |<br />
| Montgomery, 5b, RM | 5.49 2.96x 3220 4.60x | 29.51 2.71x 6164 4.60x |<br />
| Montgomery, 6b, RM | 5.59 2.90x 5460 7.80x | 29.33 2.72x 10452 7.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Configured | 16.52 0.98x 700 1.00x | 81.13 0.98x 1340 1.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
<br />
Public key, exponent length = 17 bits, all times in ms<br />
<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Modulus | 1024 bits | 2048 bits |<br />
| Algorithm | Time x Memory x | Time x Memory x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, fast | 0.42 1.00x 804 1.00x | 1.16 1.00x 1572 1.00x |<br />
| Basic, ladder | 0.76 0.55x 1072 1.33x | 2.45 0.47x 2096 1.33x |<br />
| Basic, 2b, FW | 0.53 0.79x 1876 2.33x | 1.53 0.76x 3668 2.33x |<br />
| Basic, 3b, FW | 0.59 0.71x 2948 3.67x | 1.71 0.68x 5764 3.67x |<br />
| Basic, 4b, FW | 0.84 0.50x 5092 6.33x | 2.48 0.47x 9956 6.33x |<br />
| Basic, 5b, FW | 1.29 0.32x 9380 11.67x | 3.80 0.30x 18340 11.67x |<br />
| Basic, 6b, FW | 2.04 0.20x 17956 22.33x | 6.52 0.18x 35108 22.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, 2b, RM | 0.50 0.83x 1876 2.33x | 1.32 0.88x 3668 2.33x |<br />
| Basic, 3b, RM | 0.50 0.83x 2412 3.00x | 1.44 0.81x 4716 3.00x |<br />
| Basic, 4b, RM | 0.62 0.68x 3484 4.33x | 1.81 0.64x 6812 4.33x |<br />
| Basic, 5b, RM | 0.86 0.48x 5628 7.00x | 2.51 0.46x 11004 7.00x |<br />
| Basic, 6b, RM | 1.28 0.33x 9916 12.33x | 3.96 0.29x 19388 12.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, fast | 0.67 0.62x 1340 1.67x | 2.03 0.57x 2620 1.67x |<br />
| Barrett, ladder | 2.09 0.20x 1608 2.00x | 4.24 0.27x 3144 2.00x |<br />
| Barrett, 2b, FW | 1.10 0.38x 2412 3.00x | 2.54 0.46x 4716 3.00x |<br />
| Barrett, 3b, FW | 1.28 0.32x 3484 4.33x | 3.00 0.39x 6812 4.33x |<br />
| Barrett, 4b, FW | 1.95 0.21x 5628 7.00x | 4.21 0.28x 11004 7.00x |<br />
| Barrett, 5b, FW | 3.30 0.13x 9916 12.33x | 6.63 0.17x 19388 12.33x |<br />
| Barrett, 6b, FW | 5.65 0.07x 18492 23.00x | 11.47 0.10x 36156 23.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, 2b, RM | 1.12 0.37x 2412 3.00x | 2.48 0.47x 4716 3.00x |<br />
| Barrett, 3b, RM | 1.22 0.34x 2948 3.67x | 2.63 0.44x 5764 3.67x |<br />
| Barrett, 4b, RM | 1.50 0.28x 4020 5.00x | 3.12 0.37x 7860 5.00x |<br />
| Barrett, 5b, RM | 2.02 0.21x 6164 7.67x | 4.35 0.27x 12052 7.67x |<br />
| Barrett, 6b, RM | 3.19 0.13x 10452 13.00x | 6.75 0.17x 20436 13.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, fast | 0.26 1.63x 804 1.00x | 0.87 1.34x 1572 1.00x |<br />
| Montgomery, ladder | 0.51 0.81x 1072 1.33x | 1.61 0.72x 2096 1.33x |<br />
| Montgomery, 2b, FW | 0.39 1.08x 1876 2.33x | 1.30 0.89x 3668 2.33x |<br />
| Montgomery, 3b, FW | 0.41 1.02x 2948 3.67x | 1.35 0.86x 5764 3.67x |<br />
| Montgomery, 4b, FW | 0.53 0.79x 5092 6.33x | 1.73 0.67x 9956 6.33x |<br />
| Montgomery, 5b, FW | 0.73 0.57x 9380 11.67x | 2.47 0.47x 18340 11.67x |<br />
| Montgomery, 6b, FW | 1.15 0.36x 17956 22.33x | 3.83 0.30x 35108 22.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, 2b, RM | 0.36 1.17x 1876 2.33x | 1.03 1.12x 3668 2.33x |<br />
| Montgomery, 3b, RM | 0.40 1.05x 2412 3.00x | 1.13 1.03x 4716 3.00x |<br />
| Montgomery, 4b, RM | 0.49 0.85x 3484 4.33x | 1.38 0.84x 6812 4.33x |<br />
| Montgomery, 5b, RM | 0.62 0.67x 5628 7.00x | 1.73 0.67x 11004 7.00x |<br />
| Montgomery, 6b, RM | 0.87 0.48x 9916 12.33x | 2.40 0.48x 19388 12.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Configured | 0.42 1.00x 804 1.00x | 1.15 1.01x 1572 1.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
<br />
Benchmark complete<br />
<br />
STOP.<br />
</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emCrypt&diff=17241
emCrypt
2023-12-09T23:50:47Z
<p>Paul: </p>
<hr />
<div>emCrypt is a secure and efficient implementation of essential cryptographic algorithms specifically designed for embedded systems.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/emcrypt product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ Cryptography benchmarks on real hardware<br />
|-<br />
! scope="col" | Benchmark<br />
! scope="col" | Device<br />
! scope="col" | Core<br />
! scope="col" | Speed<br />
! scope="col" | HW Accel<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| ECDSA sign and verify || STM32F072 || CM0 || 48 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F072|Results]]<br />
|-<br />
| ECDSA sign and verify || R7FS124 || CM0 || 24 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_R7FS124|Results]]<br />
|-<br />
| ECDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| ECDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[ECDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| EdDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| EdDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[EdDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| Hash algorithms || MK66FN2M0 || CM4 || 168 MHz || Yes || Run from flash, data in internal RAM || [[Hash_MK66FN2M0|Results]]<br />
|-<br />
| Hash algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[Hash_STM32F746|Results]]<br />
|-<br />
| Hash algorithms || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32F756|Results]]<br />
|-<br />
| Hash algorithms || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32H753|Results]]<br />
|-<br />
| Hash algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[Hash_AT91SAM9263|Results]]<br />
|-<br />
| MAC algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32F746|Results]]<br />
|-<br />
| MAC algorithms || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32FH753|Results]]<br />
|-<br />
| MAC algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[MAC_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[RSA_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || STM32F756 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32F756|Results]]<br />
|-<br />
| RSA (ModExp) || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32H753|Results]]<br />
|-<br />
| RSA (ModExp) || i.MXRT1176 || CM7 || 996 MHz || No || Run from flash, data in internal RAM || [[RSA_iMXRT1176|Results]]<br />
|-<br />
| RSA (ModExp) || GD32VW55 || RV32IMC || 160 MHz || No || Run from flash, data in internal RAM || [[RSA_GD32VW55 |Results]]<br />
|-<br />
| RNG + DRBG || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RNG_STM32H753|Results]]<br />
|-<br />
| Cipher (AES) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[AES_ATSAM9263|Results]]<br />
|-<br />
| Cipher (AES) || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32F756|Results]]<br />
|-<br />
| Cipher (AES) || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32H753|Results]]<br />
|-<br />
|}<br />
<br />
== FAQs ==<br />
<br />
=== For safety, my application cannot use a heap. How can I use emCrypt? ===<br />
<br />
All hashes, ciphers, MACs, and other simple cryptographic operations never require the use of a heap; such operations ''may'' use a ''context'' that the caller provides.<br />
<br />
Public key operations and signature algorithms (such as RSA, ECDSA, and EdDSA) and key agreement protocols based on integer factorization and elliptic curve cryptography (such as DH and ECDH) require an allocator. However, the allocator implementation is entirely under control of the caller and emCrypt never uses <code>malloc()</code> and <code>free()</code> internally.<br />
<br />
emCrypt ships with a set of memory allocators:<br />
<br />
* Use a fixed area of memory with dynamic block sizes.<br />
* Use a fixed area of memory with constant-size block sizes.<br />
* Use a fixed area of memory with power-of-two sizes that avoids fragmentation.<br />
* Use the system heap through <code>malloc()</code> and <code>free()</code> for e.g. desktop applications.<br />
<br />
All benchmarks demonstrate use of the emCrypt API using a fixed-size memory area and constant-size blocks avoiding use of any heap. Please refer to the emCrypt applications that ship in the product for examples of how to use fixed-size memory for API calls that require an allocator.</div>
Paul
https://wiki.segger.com/index.php?title=emCrypt&diff=17240
emCrypt
2023-12-09T23:49:11Z
<p>Paul: /* Performance */</p>
<hr />
<div>emCrypt is a secure and efficient implementation of essential cryptographic algorithms specifically designed for embedded systems.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/emcrypt product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ Cryptography benchmarks on real hardware<br />
|-<br />
! scope="col" | Benchmark<br />
! scope="col" | Device<br />
! scope="col" | Core<br />
! scope="col" | Speed<br />
! scope="col" | HW Accel<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| ECDSA sign and verify || STM32F072 || CM0 || 48 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F072|Results]]<br />
|-<br />
| ECDSA sign and verify || R7FS124 || CM0 || 24 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_R7FS124|Results]]<br />
|-<br />
| ECDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| ECDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[ECDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| EdDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| EdDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[EdDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| Hash algorithms || MK66FN2M0 || CM4 || 168 MHz || Yes || Run from flash, data in internal RAM || [[Hash_MK66FN2M0|Results]]<br />
|-<br />
| Hash algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[Hash_STM32F746|Results]]<br />
|-<br />
| Hash algorithms || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32F756|Results]]<br />
|-<br />
| Hash algorithms || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32H753|Results]]<br />
|-<br />
| Hash algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[Hash_AT91SAM9263|Results]]<br />
|-<br />
| MAC algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32F746|Results]]<br />
|-<br />
| MAC algorithms || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32FH753|Results]]<br />
|-<br />
| MAC algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[MAC_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[RSA_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || STM32F756 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32F756|Results]]<br />
|-<br />
| RSA (ModExp) || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32H753|Results]]<br />
|-<br />
| RSA (ModExp) || RT1176 || CM7 || 996 MHz || No || Run from flash, data in internal RAM || [[RSA_RT1176|Results]]<br />
|-<br />
| RSA (ModExp) || GD32VW55 || RV32IMC || 160 MHz || No || Run from flash, data in internal RAM || [[RSA_GD32VW55 |Results]]<br />
|-<br />
| RNG + DRBG || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RNG_STM32H753|Results]]<br />
|-<br />
| Cipher (AES) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[AES_ATSAM9263|Results]]<br />
|-<br />
| Cipher (AES) || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32F756|Results]]<br />
|-<br />
| Cipher (AES) || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32H753|Results]]<br />
|-<br />
|}<br />
<br />
== FAQs ==<br />
<br />
=== For safety, my application cannot use a heap. How can I use emCrypt? ===<br />
<br />
All hashes, ciphers, MACs, and other simple cryptographic operations never require the use of a heap; such operations ''may'' use a ''context'' that the caller provides.<br />
<br />
Public key operations and signature algorithms (such as RSA, ECDSA, and EdDSA) and key agreement protocols based on integer factorization and elliptic curve cryptography (such as DH and ECDH) require an allocator. However, the allocator implementation is entirely under control of the caller and emCrypt never uses <code>malloc()</code> and <code>free()</code> internally.<br />
<br />
emCrypt ships with a set of memory allocators:<br />
<br />
* Use a fixed area of memory with dynamic block sizes.<br />
* Use a fixed area of memory with constant-size block sizes.<br />
* Use a fixed area of memory with power-of-two sizes that avoids fragmentation.<br />
* Use the system heap through <code>malloc()</code> and <code>free()</code> for e.g. desktop applications.<br />
<br />
All benchmarks demonstrate use of the emCrypt API using a fixed-size memory area and constant-size blocks avoiding use of any heap. Please refer to the emCrypt applications that ship in the product for examples of how to use fixed-size memory for API calls that require an allocator.</div>
Paul
https://wiki.segger.com/index.php?title=emCrypt&diff=16988
emCrypt
2023-11-17T23:01:22Z
<p>Paul: </p>
<hr />
<div>emCrypt is a secure and efficient implementation of essential cryptographic algorithms specifically designed for embedded systems.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/emcrypt product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ Cryptography benchmarks on real hardware<br />
|-<br />
! scope="col" | Benchmark<br />
! scope="col" | Device<br />
! scope="col" | Core<br />
! scope="col" | Speed<br />
! scope="col" | HW Accel<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| ECDSA sign and verify || STM32F072 || CM0 || 48 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F072|Results]]<br />
|-<br />
| ECDSA sign and verify || R7FS124 || CM0 || 24 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_R7FS124|Results]]<br />
|-<br />
| ECDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| ECDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[ECDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| EdDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| EdDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[EdDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| Hash algorithms || MK66FN2M0 || CM4 || 168 MHz || Yes || Run from flash, data in internal RAM || [[Hash_MK66FN2M0|Results]]<br />
|-<br />
| Hash algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[Hash_STM32F746|Results]]<br />
|-<br />
| Hash algorithms || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32F756|Results]]<br />
|-<br />
| Hash algorithms || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32H753|Results]]<br />
|-<br />
| Hash algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[Hash_AT91SAM9263|Results]]<br />
|-<br />
| MAC algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32F746|Results]]<br />
|-<br />
| MAC algorithms || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32FH753|Results]]<br />
|-<br />
| MAC algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[MAC_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[RSA_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || STM32F756 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32F756|Results]]<br />
|-<br />
| RSA (ModExp) || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32H753|Results]]<br />
|-<br />
| RSA (ModExp) || GD32VW55 || RV32IMC || 160 MHz || No || Run from flash, data in internal RAM || [[RSA_GD32VW55 |Results]]<br />
|-<br />
| RNG + DRBG || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RNG_STM32H753|Results]]<br />
|-<br />
| Cipher (AES) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[AES_ATSAM9263|Results]]<br />
|-<br />
| Cipher (AES) || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32F756|Results]]<br />
|-<br />
| Cipher (AES) || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32H753|Results]]<br />
|-<br />
|}<br />
<br />
== FAQs ==<br />
<br />
=== For safety, my application cannot use a heap. How can I use emCrypt? ===<br />
<br />
All hashes, ciphers, MACs, and other simple cryptographic operations never require the use of a heap; such operations ''may'' use a ''context'' that the caller provides.<br />
<br />
Public key operations and signature algorithms (such as RSA, ECDSA, and EdDSA) and key agreement protocols based on integer factorization and elliptic curve cryptography (such as DH and ECDH) require an allocator. However, the allocator implementation is entirely under control of the caller and emCrypt never uses <code>malloc()</code> and <code>free()</code> internally.<br />
<br />
emCrypt ships with a set of memory allocators:<br />
<br />
* Use a fixed area of memory with dynamic block sizes.<br />
* Use a fixed area of memory with constant-size block sizes.<br />
* Use a fixed area of memory with power-of-two sizes that avoids fragmentation.<br />
* Use the system heap through <code>malloc()</code> and <code>free()</code> for e.g. desktop applications.<br />
<br />
All benchmarks demonstrate use of the emCrypt API using a fixed-size memory area and constant-size blocks avoiding use of any heap. Please refer to the emCrypt applications that ship in the product for examples of how to use fixed-size memory for API calls that require an allocator.</div>
Paul
https://wiki.segger.com/index.php?title=RSA_GD32VW55&diff=16987
RSA GD32VW55
2023-11-17T22:58:30Z
<p>Paul: </p>
<hr />
<div> <nowiki>Copyright (c) 2014-2021 SEGGER Microcontroller GmbH www.segger.com<br />
Modular Exponentiation Benchmark compiled Nov 17 2023 22:51:42<br />
<br />
Compiler: gcc 12.2.0<br />
System: Processor speed = 160.000 MHz<br />
Config: CRYPTO_VERSION = 24001 [2.40a]<br />
Config: CRYPTO_MPI_BITS_PER_LIMB = 32<br />
<br />
Modular Arithmetic Performance<br />
==============================<br />
<br />
CRT private key, exponent length = modulus length, all times in ms<br />
<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Modulus | 1024 bits | 2048 bits |<br />
| Algorithm | Time x Memory x | Time x Memory x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, fast | 286.16 1.00x 700 1.00x | 1593.21 1.00x 1340 1.00x |<br />
| Basic, ladder | 410.12 0.70x 840 1.20x | 2984.72 0.53x 1608 1.20x |<br />
| Basic, 2b, FW | 271.67 1.05x 1260 1.80x | 1656.15 0.96x 2412 1.80x |<br />
| Basic, 3b, FW | 259.49 1.10x 1820 2.60x | 1748.19 0.91x 3484 2.60x |<br />
| Basic, 4b, FW | 250.84 1.14x 2940 4.20x | 1747.13 0.91x 5628 4.20x |<br />
| Basic, 5b, FW | 248.65 1.15x 5180 7.40x | 1721.95 0.93x 9916 7.40x |<br />
| Basic, 6b, FW | 253.20 1.13x 9660 13.80x | 1695.42 0.94x 18492 13.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, 2b, RM | 267.40 1.07x 1260 1.80x | 1622.02 0.98x 2412 1.80x |<br />
| Basic, 3b, RM | 255.68 1.12x 1540 2.20x | 1674.17 0.95x 2948 2.20x |<br />
| Basic, 4b, RM | 247.61 1.16x 2100 3.00x | 1691.23 0.94x 4020 3.00x |<br />
| Basic, 5b, RM | 243.38 1.18x 3220 4.60x | 1682.79 0.95x 6164 4.60x |<br />
| Basic, 6b, RM | 243.70 1.17x 5460 7.80x | 1671.71 0.95x 10452 7.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, fast | 232.68 1.23x 980 1.40x | 1149.34 1.39x 1876 1.40x |<br />
| Barrett, ladder | 325.89 0.88x 1120 1.60x | 2036.57 0.78x 2144 1.60x |<br />
| Barrett, 2b, FW | 219.94 1.30x 1540 2.20x | 1187.37 1.34x 2948 2.20x |<br />
| Barrett, 3b, FW | 207.41 1.38x 2100 3.00x | 1213.71 1.31x 4020 3.00x |<br />
| Barrett, 4b, FW | 200.10 1.43x 3220 4.60x | 1194.90 1.33x 6164 4.60x |<br />
| Barrett, 5b, FW | 198.37 1.44x 5460 7.80x | 1174.12 1.36x 10452 7.80x |<br />
| Barrett, 6b, FW | 202.34 1.41x 9940 14.20x | 1158.97 1.37x 19028 14.20x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, 2b, RM | 215.03 1.33x 1540 2.20x | 1153.46 1.38x 2948 2.20x |<br />
| Barrett, 3b, RM | 204.36 1.40x 1820 2.60x | 1166.11 1.37x 3484 2.60x |<br />
| Barrett, 4b, RM | 197.15 1.45x 2380 3.40x | 1161.73 1.37x 4556 3.40x |<br />
| Barrett, 5b, RM | 193.88 1.48x 3500 5.00x | 1150.11 1.39x 6700 5.00x |<br />
| Barrett, 6b, RM | 193.83 1.48x 5740 8.20x | 1142.75 1.39x 10988 8.20x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, fast | 242.63 1.18x 700 1.00x | 1741.34 0.91x 1340 1.00x |<br />
| Montgomery, ladder | 325.22 0.88x 840 1.20x | 2309.82 0.69x 1608 1.20x |<br />
| Montgomery, 2b, FW | 244.66 1.17x 1260 1.80x | 1737.05 0.92x 2412 1.80x |<br />
| Montgomery, 3b, FW | 219.38 1.30x 1820 2.60x | 1551.13 1.03x 3484 2.60x |<br />
| Montgomery, 4b, FW | 208.68 1.37x 2940 4.20x | 1465.12 1.09x 5628 4.20x |<br />
| Montgomery, 5b, FW | 206.20 1.39x 5180 7.40x | 1425.90 1.12x 9916 7.40x |<br />
| Montgomery, 6b, FW | 211.13 1.36x 9660 13.80x | 1425.14 1.12x 18492 13.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, 2b, RM | 222.64 1.29x 1260 1.80x | 1596.91 1.00x 2412 1.80x |<br />
| Montgomery, 3b, RM | 211.16 1.36x 1540 2.20x | 1500.46 1.06x 2948 2.20x |<br />
| Montgomery, 4b, RM | 203.73 1.40x 2100 3.00x | 1436.88 1.11x 4020 3.00x |<br />
| Montgomery, 5b, RM | 200.43 1.43x 3220 4.60x | 1404.70 1.13x 6164 4.60x |<br />
| Montgomery, 6b, RM | 200.66 1.43x 5460 7.80x | 1385.82 1.15x 10452 7.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Configured | 286.10 1.00x 700 1.00x | 1593.20 1.00x 1340 1.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
<br />
Public key, exponent length = 17 bits, all times in ms<br />
<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Modulus | 1024 bits | 2048 bits |<br />
| Algorithm | Time x Memory x | Time x Memory x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, fast | 10.42 1.00x 804 1.00x | 43.29 1.00x 1572 1.00x |<br />
| Basic, ladder | 20.91 0.50x 1072 1.33x | 86.44 0.50x 2096 1.33x |<br />
| Basic, 2b, FW | 11.88 0.88x 1876 2.33x | 48.78 0.89x 3668 2.33x |<br />
| Basic, 3b, FW | 13.85 0.75x 2948 3.67x | 56.71 0.76x 5764 3.67x |<br />
| Basic, 4b, FW | 19.65 0.53x 5092 6.33x | 79.26 0.55x 9956 6.33x |<br />
| Basic, 5b, FW | 29.37 0.35x 9380 11.67x | 115.51 0.37x 18340 11.67x |<br />
| Basic, 6b, FW | 47.73 0.22x 17956 22.33x | 179.91 0.24x 35108 22.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, 2b, RM | 11.68 0.89x 1876 2.33x | 48.36 0.90x 3668 2.33x |<br />
| Basic, 3b, RM | 12.99 0.80x 2412 3.00x | 53.66 0.81x 4716 3.00x |<br />
| Basic, 4b, RM | 15.63 0.67x 3484 4.33x | 63.89 0.68x 6812 4.33x |<br />
| Basic, 5b, RM | 20.86 0.50x 5628 7.00x | 83.99 0.52x 11004 7.00x |<br />
| Basic, 6b, RM | 31.23 0.33x 9916 12.33x | 123.19 0.35x 19388 12.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, fast | 8.73 1.19x 1340 1.67x | 31.01 1.40x 2620 1.67x |<br />
| Barrett, ladder | 17.58 0.59x 1608 2.00x | 62.60 0.69x 3144 2.00x |<br />
| Barrett, 2b, FW | 10.08 1.03x 2412 3.00x | 35.09 1.23x 4716 3.00x |<br />
| Barrett, 3b, FW | 11.59 0.90x 3484 4.33x | 40.46 1.07x 6812 4.33x |<br />
| Barrett, 4b, FW | 16.17 0.64x 5628 7.00x | 56.01 0.77x 11004 7.00x |<br />
| Barrett, 5b, FW | 23.89 0.44x 9916 12.33x | 81.86 0.53x 19388 12.33x |<br />
| Barrett, 6b, FW | 38.68 0.27x 18492 23.00x | 128.50 0.34x 36156 23.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, 2b, RM | 9.74 1.07x 2412 3.00x | 34.44 1.26x 4716 3.00x |<br />
| Barrett, 3b, RM | 10.77 0.97x 2948 3.67x | 38.01 1.14x 5764 3.67x |<br />
| Barrett, 4b, RM | 12.87 0.81x 4020 5.00x | 45.19 0.96x 7860 5.00x |<br />
| Barrett, 5b, RM | 17.02 0.61x 6164 7.67x | 59.26 0.73x 12052 7.67x |<br />
| Barrett, 6b, RM | 25.24 0.41x 10452 13.00x | 86.74 0.50x 20436 13.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, fast | 11.91 0.87x 804 1.00x | 45.36 0.95x 1572 1.00x |<br />
| Montgomery, ladder | 21.58 0.48x 1072 1.33x | 82.42 0.53x 2096 1.33x |<br />
| Montgomery, 2b, FW | 18.03 0.58x 1876 2.33x | 68.75 0.63x 3668 2.33x |<br />
| Montgomery, 3b, FW | 18.62 0.56x 2948 3.67x | 70.92 0.61x 5764 3.67x |<br />
| Montgomery, 4b, FW | 23.72 0.44x 5092 6.33x | 90.19 0.48x 9956 6.33x |<br />
| Montgomery, 5b, FW | 32.21 0.32x 9380 11.67x | 122.30 0.35x 18340 11.67x |<br />
| Montgomery, 6b, FW | 48.82 0.21x 17956 22.33x | 184.41 0.23x 35108 22.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, 2b, RM | 13.60 0.77x 1876 2.33x | 51.78 0.84x 3668 2.33x |<br />
| Montgomery, 3b, RM | 14.72 0.71x 2412 3.00x | 56.05 0.77x 4716 3.00x |<br />
| Montgomery, 4b, RM | 18.09 0.58x 3484 4.33x | 68.86 0.63x 6812 4.33x |<br />
| Montgomery, 5b, RM | 22.60 0.46x 5628 7.00x | 86.01 0.50x 11004 7.00x |<br />
| Montgomery, 6b, RM | 30.54 0.34x 9916 12.33x | 116.07 0.37x 19388 12.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Configured | 10.42 1.00x 804 1.00x | 43.29 1.00x 1572 1.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
<br />
Benchmark complete</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=RSA_GD32VW55&diff=16986
RSA GD32VW55
2023-11-17T22:41:17Z
<p>Paul: Created page with " <nowiki>Copyright (c) 2014-2021 SEGGER Microcontroller GmbH www.segger.com Modular Exponentiation Benchmark compiled Nov 17 2023 22:28:23 Compiler: SEGGER cc 16.0.6 Syste..."</p>
<hr />
<div> <nowiki>Copyright (c) 2014-2021 SEGGER Microcontroller GmbH www.segger.com<br />
Modular Exponentiation Benchmark compiled Nov 17 2023 22:28:23<br />
<br />
Compiler: SEGGER cc 16.0.6<br />
System: Processor speed = 160.000 MHz<br />
Config: CRYPTO_VERSION = 24001 [2.40a]<br />
Config: CRYPTO_MPI_BITS_PER_LIMB = 32<br />
<br />
Modular Arithmetic Performance<br />
==============================<br />
<br />
CRT private key, exponent length = modulus length, all times in ms<br />
<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Modulus | 1024 bits | 2048 bits |<br />
| Algorithm | Time x Memory x | Time x Memory x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, fast | 317.41 1.00x 700 1.00x | 1741.63 1.00x 1340 1.00x |<br />
| Basic, ladder | 452.71 0.70x 840 1.20x | 3231.04 0.54x 1608 1.20x |<br />
| Basic, 2b, FW | 301.83 1.05x 1260 1.80x | 1809.04 0.96x 2412 1.80x |<br />
| Basic, 3b, FW | 288.33 1.10x 1820 2.60x | 1906.81 0.91x 3484 2.60x |<br />
| Basic, 4b, FW | 278.86 1.14x 2940 4.20x | 1905.20 0.91x 5628 4.20x |<br />
| Basic, 5b, FW | 276.08 1.15x 5180 7.40x | 1878.17 0.93x 9916 7.40x |<br />
| Basic, 6b, FW | 281.52 1.13x 9660 13.80x | 1849.95 0.94x 18492 13.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, 2b, RM | 296.87 1.07x 1260 1.80x | 1771.86 0.98x 2412 1.80x |<br />
| Basic, 3b, RM | 284.05 1.12x 1540 2.20x | 1827.32 0.95x 2948 2.20x |<br />
| Basic, 4b, RM | 274.60 1.16x 2100 3.00x | 1845.30 0.94x 4020 3.00x |<br />
| Basic, 5b, RM | 270.21 1.17x 3220 4.60x | 1836.14 0.95x 6164 4.60x |<br />
| Basic, 6b, RM | 270.72 1.17x 5460 7.80x | 1824.38 0.95x 10452 7.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, fast | 247.91 1.28x 980 1.40x | 1190.34 1.46x 1876 1.40x |<br />
| Barrett, ladder | 345.61 0.92x 1120 1.60x | 2085.06 0.84x 2144 1.60x |<br />
| Barrett, 2b, FW | 235.36 1.35x 1540 2.20x | 1228.27 1.42x 2948 2.20x |<br />
| Barrett, 3b, FW | 221.49 1.43x 2100 3.00x | 1250.83 1.39x 4020 3.00x |<br />
| Barrett, 4b, FW | 213.41 1.49x 3220 4.60x | 1230.45 1.42x 6164 4.60x |<br />
| Barrett, 5b, FW | 211.64 1.50x 5460 7.80x | 1209.05 1.44x 10452 7.80x |<br />
| Barrett, 6b, FW | 215.98 1.47x 9940 14.20x | 1194.03 1.46x 19028 14.20x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, 2b, RM | 229.27 1.38x 1540 2.20x | 1191.72 1.46x 2948 2.20x |<br />
| Barrett, 3b, RM | 218.03 1.46x 1820 2.60x | 1202.55 1.45x 3484 2.60x |<br />
| Barrett, 4b, RM | 210.15 1.51x 2380 3.40x | 1197.01 1.45x 4556 3.40x |<br />
| Barrett, 5b, RM | 206.91 1.53x 3500 5.00x | 1184.82 1.47x 6700 5.00x |<br />
| Barrett, 6b, RM | 206.81 1.53x 5740 8.20x | 1177.27 1.48x 10988 8.20x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, fast | 244.94 1.30x 700 1.00x | 1760.62 0.99x 1340 1.00x |<br />
| Montgomery, ladder | 328.26 0.97x 840 1.20x | 2335.69 0.75x 1608 1.20x |<br />
| Montgomery, 2b, FW | 246.93 1.29x 1260 1.80x | 1756.60 0.99x 2412 1.80x |<br />
| Montgomery, 3b, FW | 221.50 1.43x 1820 2.60x | 1569.15 1.11x 3484 2.60x |<br />
| Montgomery, 4b, FW | 210.75 1.51x 2940 4.20x | 1482.17 1.18x 5628 4.20x |<br />
| Montgomery, 5b, FW | 208.33 1.52x 5180 7.40x | 1442.43 1.21x 9916 7.40x |<br />
| Montgomery, 6b, FW | 213.35 1.49x 9660 13.80x | 1441.73 1.21x 18492 13.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, 2b, RM | 224.84 1.41x 1260 1.80x | 1615.21 1.08x 2412 1.80x |<br />
| Montgomery, 3b, RM | 213.25 1.49x 1540 2.20x | 1517.88 1.15x 2948 2.20x |<br />
| Montgomery, 4b, RM | 205.76 1.54x 2100 3.00x | 1453.65 1.20x 4020 3.00x |<br />
| Montgomery, 5b, RM | 202.47 1.57x 3220 4.60x | 1421.05 1.23x 6164 4.60x |<br />
| Montgomery, 6b, RM | 202.74 1.57x 5460 7.80x | 1402.01 1.24x 10452 7.80x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Configured | 317.38 1.00x 700 1.00x | 1741.62 1.00x 1340 1.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
<br />
Public key, exponent length = 17 bits, all times in ms<br />
<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Modulus | 1024 bits | 2048 bits |<br />
| Algorithm | Time x Memory x | Time x Memory x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, fast | 11.52 1.00x 804 1.00x | 47.04 1.00x 1572 1.00x |<br />
| Basic, ladder | 22.88 0.50x 1072 1.33x | 92.82 0.51x 2096 1.33x |<br />
| Basic, 2b, FW | 13.11 0.88x 1876 2.33x | 52.86 0.89x 3668 2.33x |<br />
| Basic, 3b, FW | 15.23 0.76x 2948 3.67x | 61.16 0.77x 5764 3.67x |<br />
| Basic, 4b, FW | 21.50 0.54x 5092 6.33x | 85.12 0.55x 9956 6.33x |<br />
| Basic, 5b, FW | 31.99 0.36x 9380 11.67x | 123.94 0.38x 18340 11.67x |<br />
| Basic, 6b, FW | 51.76 0.22x 17956 22.33x | 192.42 0.24x 35108 22.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Basic, 2b, RM | 12.91 0.89x 1876 2.33x | 52.48 0.90x 3668 2.33x |<br />
| Basic, 3b, RM | 14.32 0.80x 2412 3.00x | 58.09 0.81x 4716 3.00x |<br />
| Basic, 4b, RM | 17.17 0.67x 3484 4.33x | 68.93 0.68x 6812 4.33x |<br />
| Basic, 5b, RM | 22.83 0.50x 5628 7.00x | 90.47 0.52x 11004 7.00x |<br />
| Basic, 6b, RM | 34.02 0.34x 9916 12.33x | 130.97 0.36x 19388 12.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, fast | 9.06 1.27x 1340 1.67x | 31.60 1.49x 2620 1.67x |<br />
| Barrett, ladder | 18.12 0.64x 1608 2.00x | 63.50 0.74x 3144 2.00x |<br />
| Barrett, 2b, FW | 10.53 1.09x 2412 3.00x | 35.82 1.31x 4716 3.00x |<br />
| Barrett, 3b, FW | 12.02 0.96x 3484 4.33x | 41.16 1.14x 6812 4.33x |<br />
| Barrett, 4b, FW | 16.70 0.69x 5628 7.00x | 56.75 0.83x 11004 7.00x |<br />
| Barrett, 5b, FW | 24.54 0.47x 9916 12.33x | 82.65 0.57x 19388 12.33x |<br />
| Barrett, 6b, FW | 39.59 0.29x 18492 23.00x | 129.39 0.36x 36156 23.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Barrett, 2b, RM | 10.10 1.14x 2412 3.00x | 35.07 1.34x 4716 3.00x |<br />
| Barrett, 3b, RM | 11.15 1.03x 2948 3.67x | 38.63 1.22x 5764 3.67x |<br />
| Barrett, 4b, RM | 13.29 0.87x 4020 5.00x | 45.82 1.03x 7860 5.00x |<br />
| Barrett, 5b, RM | 17.52 0.66x 6164 7.67x | 59.97 0.78x 12052 7.67x |<br />
| Barrett, 6b, RM | 25.87 0.45x 10452 13.00x | 87.50 0.54x 20436 13.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, fast | 12.11 0.95x 804 1.00x | 46.17 1.02x 1572 1.00x |<br />
| Montgomery, ladder | 21.93 0.53x 1072 1.33x | 83.89 0.56x 2096 1.33x |<br />
| Montgomery, 2b, FW | 18.29 0.63x 1876 2.33x | 69.88 0.67x 3668 2.33x |<br />
| Montgomery, 3b, FW | 18.88 0.61x 2948 3.67x | 72.09 0.65x 5764 3.67x |<br />
| Montgomery, 4b, FW | 24.06 0.48x 5092 6.33x | 91.65 0.51x 9956 6.33x |<br />
| Montgomery, 5b, FW | 32.66 0.35x 9380 11.67x | 124.22 0.38x 18340 11.67x |<br />
| Montgomery, 6b, FW | 49.49 0.23x 17956 22.33x | 187.24 0.25x 35108 22.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Montgomery, 2b, RM | 13.82 0.83x 1876 2.33x | 52.68 0.89x 3668 2.33x |<br />
| Montgomery, 3b, RM | 14.95 0.77x 2412 3.00x | 57.02 0.82x 4716 3.00x |<br />
| Montgomery, 4b, RM | 18.35 0.63x 3484 4.33x | 70.01 0.67x 6812 4.33x |<br />
| Montgomery, 5b, RM | 22.91 0.50x 5628 7.00x | 87.42 0.54x 11004 7.00x |<br />
| Montgomery, 6b, RM | 30.95 0.37x 9916 12.33x | 117.93 0.40x 19388 12.33x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
| Configured | 11.52 1.00x 804 1.00x | 47.04 1.00x 1572 1.00x |<br />
+---------------------------+--------------------------------+--------------------------------+<br />
<br />
Benchmark complete</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emCrypt&diff=16985
emCrypt
2023-11-17T22:39:47Z
<p>Paul: </p>
<hr />
<div>emCrypt is a secure and efficient implementation of essential cryptographic algorithms specifically designed for embedded systems.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/emcrypt product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ Cryptography benchmarks on real hardware<br />
|-<br />
! scope="col" | Benchmark<br />
! scope="col" | Device<br />
! scope="col" | Core<br />
! scope="col" | Speed<br />
! scope="col" | HW Accel<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| ECDSA sign and verify || STM32F072 || CM0 || 48 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F072|Results]]<br />
|-<br />
| ECDSA sign and verify || R7FS124 || CM0 || 24 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_R7FS124|Results]]<br />
|-<br />
| ECDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| ECDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[ECDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| ECDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[ECDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| EdDSA sign and verify || MK66FN2M0 || CM4 || 168 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_MK66FN2M0|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32F746|Results]]<br />
|-<br />
| EdDSA sign and verify || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[EdDSA_Sign_Verify_STM32H753|Results]]<br />
|-<br />
| EdDSA sign and verify || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[EdDSA_Sign_Verify_AT91SAM9263|Results]]<br />
|-<br />
| Hash algorithms || MK66FN2M0 || CM4 || 168 MHz || Yes || Run from flash, data in internal RAM || [[Hash_MK66FN2M0|Results]]<br />
|-<br />
| Hash algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[Hash_STM32F746|Results]]<br />
|-<br />
| Hash algorithms || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32F756|Results]]<br />
|-<br />
| Hash algorithms || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[Hash_STM32H753|Results]]<br />
|-<br />
| Hash algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[Hash_AT91SAM9263|Results]]<br />
|-<br />
| MAC algorithms || STM32F746 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32F746|Results]]<br />
|-<br />
| MAC algorithms || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[MAC_STM32FH753|Results]]<br />
|-<br />
| MAC algorithms || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[MAC_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[RSA_ATSAM9263|Results]]<br />
|-<br />
| RSA (ModExp) || STM32F756 || CM7 || 200 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32F756|Results]]<br />
|-<br />
| RSA (ModExp) || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RSA_STM32H753|Results]]<br />
|-<br />
| RSA (ModExp) || GD32VW55 || RV32 || 160 MHz || No || Run from flash, data in internal RAM || [[RSA_GD32VW55 |Results]]<br />
|-<br />
| RNG + DRBG || STM32H753 || CM7 || 400 MHz || No || Run from flash, data in internal RAM || [[RNG_STM32H753|Results]]<br />
|-<br />
| Cipher (AES) || AT91SAM9263 || ARM926 || 200 MHz || No || Run from SDRAM with cache enabled || [[AES_ATSAM9263|Results]]<br />
|-<br />
| Cipher (AES) || STM32F756 || CM7 || 200 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32F756|Results]]<br />
|-<br />
| Cipher (AES) || STM32H753 || CM7 || 400 MHz || Yes || Run from flash, data in internal RAM || [[AES_STM32H753|Results]]<br />
|-<br />
|}<br />
<br />
== FAQs ==<br />
<br />
=== For safety, my application cannot use a heap. How can I use emCrypt? ===<br />
<br />
All hashes, ciphers, MACs, and other simple cryptographic operations never require the use of a heap; such operations ''may'' use a ''context'' that the caller provides.<br />
<br />
Public key operations and signature algorithms (such as RSA, ECDSA, and EdDSA) and key agreement protocols based on integer factorization and elliptic curve cryptography (such as DH and ECDH) require an allocator. However, the allocator implementation is entirely under control of the caller and emCrypt never uses <code>malloc()</code> and <code>free()</code> internally.<br />
<br />
emCrypt ships with a set of memory allocators:<br />
<br />
* Use a fixed area of memory with dynamic block sizes.<br />
* Use a fixed area of memory with constant-size block sizes.<br />
* Use a fixed area of memory with power-of-two sizes that avoids fragmentation.<br />
* Use the system heap through <code>malloc()</code> and <code>free()</code> for e.g. desktop applications.<br />
<br />
All benchmarks demonstrate use of the emCrypt API using a fixed-size memory area and constant-size blocks avoiding use of any heap. Please refer to the emCrypt applications that ship in the product for examples of how to use fixed-size memory for API calls that require an allocator.</div>
Paul
https://wiki.segger.com/index.php?title=HOWTO_decompress_an_LZ4_archive&diff=14960
HOWTO decompress an LZ4 archive
2023-05-17T09:06:00Z
<p>Paul: </p>
<hr />
<div>emCompress-Pro provides the capability to decompress streams that are compressed in various formats, but it does not provide out-of-the-box container support.<br />
<br />
Recognizing that customers may possibly want to deal with encapsulated streams, this code can be used with emCompress-Pro to check the integrity of a an LZ4 file containing an LZ4 frame (containing multiple LZ4 blocks):<br />
<br />
<syntaxhighlight lang="c"><br />
/*********************************************************************<br />
* (c) SEGGER Microcontroller GmbH *<br />
* The Embedded Experts *<br />
* www.segger.com *<br />
**********************************************************************<br />
<br />
-------------------------- END-OF-HEADER -----------------------------<br />
<br />
File : CX_LZ4.c<br />
Purpose : List the content of a LZ4-compressed file.<br />
<br />
References : LZ4 frame format - https://github.com/lz4/lz4/blob/master/doc/lz4_Frame_format.md<br />
LZ4 block format - https://github.com/lz4/lz4/blob/master/doc/lz4_Block_format.md<br />
xxHash Algorithm - https://github.com/Cyan4973/xxHash/blob/dev/doc/xxhash_spec.md<br />
<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* #include Section<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
#include "CX_Int.h"<br />
#include "SEGGER_MEM.h"<br />
#include "SEGGER_UTIL.h"<br />
#include <stdio.h><br />
#include <stdlib.h><br />
<br />
/*********************************************************************<br />
*<br />
* Defines, fixed<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
//<br />
// Flag byte<br />
//<br />
#define FLG_VERSION 0xC0<br />
#define FLG_BINDEP 0x20<br />
#define FLG_BCHK 0x10<br />
#define FLG_CSIZE 0x08<br />
#define FLG_CCHK 0x04<br />
#define FLG_DICTID 0x01<br />
<br />
//<br />
// Block descriptor<br />
//<br />
#define BD_BSIZE 0x70<br />
<br />
//<br />
// xxHash<br />
//<br />
#define PRIME32_1 2654435761u<br />
#define PRIME32_2 2246822519u<br />
#define PRIME32_3 3266489917u<br />
#define PRIME32_4 668265263u<br />
#define PRIME32_5 374761393u<br />
<br />
//<br />
// 32-bit rotate left<br />
//<br />
#define ROL(X, N) (((X) << N) | ((X) >> (32-N)))<br />
<br />
/*********************************************************************<br />
*<br />
* Local types<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
typedef struct {<br />
U32 aAcc[4];<br />
U8 aData[16];<br />
unsigned DataLen;<br />
unsigned TotalLen;<br />
} XXHASH_CONTEXT;<br />
<br />
typedef struct {<br />
U8 FLG;<br />
U8 BD;<br />
U8 HC;<br />
U8 aMagic [4];<br />
U8 aCSize [8];<br />
U8 aCRC [8];<br />
U8 aDictID [4];<br />
U8 aBlockSize [4];<br />
XXHASH_CONTEXT Cksum;<br />
U32 BlockSize;<br />
U64 CalcCSize;<br />
} FRAME_INFO;<br />
<br />
/*********************************************************************<br />
*<br />
* Static data<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
static SEGGER_MEM_CONTEXT _StaticAllocator;<br />
<br />
/*********************************************************************<br />
*<br />
* Static code<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* _XXHASH_Init()<br />
*<br />
* Function description<br />
* Initialize xxHash context.<br />
*<br />
* Parameters<br />
* pSelf - Pointer to xxHash context.<br />
* Seed - Value of seed to use.<br />
*/<br />
static void _XXHASH_Init(XXHASH_CONTEXT *pSelf, U32 Seed) {<br />
pSelf->aAcc[0] = Seed + PRIME32_1 + PRIME32_2;<br />
pSelf->aAcc[1] = Seed + PRIME32_2;<br />
pSelf->aAcc[2] = Seed + 0;<br />
pSelf->aAcc[3] = Seed - PRIME32_1;<br />
pSelf->DataLen = 0;<br />
pSelf->TotalLen = 0;<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _XXHASH_AddByte()<br />
*<br />
* Function description<br />
* Add octet to xxHash.<br />
*<br />
* Parameters<br />
* pSelf - Pointer to xxHash context.<br />
* Data - Octet to add.<br />
*/<br />
static void _XXHASH_AddByte(XXHASH_CONTEXT *pSelf, U8 Data) {<br />
unsigned i;<br />
//<br />
pSelf->aData[pSelf->DataLen++] = Data;<br />
if (pSelf->DataLen == 16) {<br />
for (i = 0; i < 4; ++i) {<br />
pSelf->aAcc[i] = pSelf->aAcc[i] + SEGGER_RdU32LE(&pSelf->aData[4*i]) * PRIME32_2;<br />
pSelf->aAcc[i] = ROL(pSelf->aAcc[i], 13);<br />
pSelf->aAcc[i] = pSelf->aAcc[i] * PRIME32_1;<br />
}<br />
pSelf->DataLen = 0;<br />
}<br />
pSelf->TotalLen += 1;<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _XXHASH_Add()<br />
*<br />
* Function description<br />
* Add octet string to xxHash.<br />
*<br />
* Parameters<br />
* pSelf - Pointer to xxHash context.<br />
* pData - Pointer to octet string.<br />
* DataLen - Octet length of the octet string.<br />
*/<br />
static void _XXHASH_Add(XXHASH_CONTEXT *pSelf, U8 *pData, unsigned DataLen) {<br />
while (DataLen > 0) {<br />
_XXHASH_AddByte(pSelf, *pData);<br />
pData += 1;<br />
DataLen -= 1;<br />
}<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _XXHASH_Get()<br />
*<br />
* Function description<br />
* Finalize and return xxHash value.<br />
*<br />
* Parameters<br />
* pSelf - Pointer to xxHash context.<br />
*<br />
* Return value<br />
* Computed xxHash value over input data.<br />
*/<br />
static U32 _XXHASH_Get(XXHASH_CONTEXT *pSelf) {<br />
U32 Acc;<br />
U8 * pData;<br />
unsigned DataLen;<br />
//<br />
if (pSelf->TotalLen < 16) {<br />
Acc = pSelf->aAcc[2] + PRIME32_5;<br />
} else {<br />
Acc = ROL(pSelf->aAcc[0], 1) +<br />
ROL(pSelf->aAcc[1], 7) +<br />
ROL(pSelf->aAcc[2], 12) +<br />
ROL(pSelf->aAcc[3], 18);<br />
}<br />
Acc += pSelf->TotalLen;<br />
//<br />
pData = pSelf->aData;<br />
DataLen = pSelf->DataLen;<br />
while (DataLen >= 4) {<br />
Acc += SEGGER_RdU32LE(pData) * PRIME32_3;<br />
Acc = ROL(Acc, 17) * PRIME32_4;<br />
pData += 4;<br />
DataLen -= 4;<br />
}<br />
//<br />
while (DataLen > 0) {<br />
Acc += *pData * PRIME32_5;<br />
Acc = ROL(Acc, 11) * PRIME32_1;<br />
pData += 1;<br />
DataLen -= 1;<br />
}<br />
//<br />
Acc ^= Acc >> 15;<br />
Acc *= PRIME32_2;<br />
Acc ^= Acc >> 13;<br />
Acc *= PRIME32_3;<br />
Acc ^= Acc >> 16;<br />
//<br />
return Acc;<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _PrintSignOn()<br />
*<br />
* Function description<br />
* Displays the application's help information on stderr.<br />
*/<br />
static void _PrintSignOn(void) {<br />
printf("\n");<br />
printf("emCompress-Flex LZ4 Checker V%s ", CX_GetVersionText());<br />
printf("compiled " __DATE__ " " __TIME__ "\n");<br />
printf("%s www.segger.com\n\n", CX_GetCopyrightText());<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _Decompress()<br />
*<br />
* Function description<br />
* Decompress LZ4 blocks.<br />
*<br />
* Parameters<br />
* pFile - Pointer to input file.<br />
* pInfo - Pointer to member information.<br />
*/<br />
static void _Decompress(CX_DECODE_CONTEXT *pContext, FILE *pFile, FRAME_INFO *pInfo) {<br />
CX_STREAM Stream;<br />
int Status;<br />
U8 ByteIn;<br />
U8 ByteOut;<br />
unsigned AvailIn;<br />
//<br />
Stream.AvailIn = 0;<br />
Stream.AvailOut = 0;<br />
//<br />
AvailIn = pInfo->BlockSize;<br />
//<br />
for (;;) {<br />
if (Stream.AvailIn == 0) {<br />
if (AvailIn != 0) {<br />
fread(&ByteIn, 1, 1, pFile);<br />
Stream.pIn = &ByteIn;<br />
Stream.AvailIn = 1;<br />
--AvailIn;<br />
}<br />
}<br />
Stream.pOut = &ByteOut;<br />
Stream.AvailOut = 1;<br />
//<br />
if (AvailIn == 0) {<br />
Status = CX_DECODE_Process(pContext, &Stream, pInfo->FLG & FLG_BINDEP ? CX_FLUSH_ALL : CX_FLUSH_SYNC);<br />
} else {<br />
Status = CX_DECODE_Process(pContext, &Stream, CX_FLUSH_NONE);<br />
}<br />
if (Status < 0) {<br />
printf("%s\n", CX_GetErrorText(Status));<br />
exit(100);<br />
}<br />
if (Stream.AvailOut == 0) {<br />
pInfo->CalcCSize++;<br />
_XXHASH_AddByte(&pInfo->Cksum, ByteOut);<br />
}<br />
if (Status == 1) {<br />
break;<br />
}<br />
}<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _DecodeFrame()<br />
*<br />
* Function description<br />
* Decode the content of an LZ4 frame, ensures compressed data<br />
* can be decompressed.<br />
*<br />
* Parameters<br />
* pFile - Pointer to input file.<br />
*<br />
* Return value<br />
* Application exit status, zero when no error.<br />
*/<br />
static int _DecodeFrame(FILE *pFile) {<br />
CX_DECODE_CONTEXT Context;<br />
CX_PARAS Paras;<br />
FRAME_INFO Info;<br />
XXHASH_CONTEXT Cksum;<br />
U32 CRC;<br />
char aStatus[128];<br />
//<br />
printf("Size CRC\n");<br />
printf("Computed Stored Computed Stored Status\n");<br />
printf("-------- -------- -------- -------- -----------------------\n");<br />
// <br />
fread(Info.aMagic, 1, sizeof(Info.aMagic), pFile);<br />
if (SEGGER_RdU32LE(Info.aMagic) != 0x184D2204) {<br />
printf("Incorrect ID bytes for an LZ4 file\n");<br />
exit(100);<br />
}<br />
//<br />
_XXHASH_Init(&Info.Cksum, 0);<br />
_XXHASH_Init(&Cksum, 0);<br />
fread(&Info.FLG, 1, 1, pFile);<br />
fread(&Info.BD, 1, 1, pFile);<br />
if (feof(pFile) || ferror(pFile)) {<br />
perror("Can't read input file");<br />
exit(100);<br />
}<br />
_XXHASH_Add(&Cksum, &Info.FLG, 1);<br />
_XXHASH_Add(&Cksum, &Info.BD, 1);<br />
//<br />
if ((Info.FLG & FLG_VERSION) != 0x40) {<br />
printf("LZ4 version not supported by this utility\n");<br />
exit(100);<br />
}<br />
//<br />
if (Info.FLG & FLG_CSIZE) {<br />
fread(Info.aCSize, 1, 4, pFile);<br />
_XXHASH_Add(&Cksum, Info.aCSize, 8);<br />
}<br />
if (Info.FLG & FLG_DICTID) {<br />
fread(Info.aDictID, 1, 4, pFile);<br />
_XXHASH_Add(&Cksum, Info.aDictID, 4);<br />
}<br />
fread(&Info.HC, 1, 1, pFile);<br />
if (Info.HC != ((_XXHASH_Get(&Cksum) >> 8) & 0xFF)) {<br />
printf("Header checksum error\n");<br />
exit(100);<br />
}<br />
//<br />
Paras.WindowSize = 65536;<br />
Paras.MinLen = 3;<br />
Paras.MaxLen = 258;<br />
Paras.BlockLen = 0;<br />
CX_DECODE_Init(&Context, &CX_LZ4_Decode, &_StaticAllocator, &Paras);<br />
//<br />
Info.CalcCSize = 0;<br />
//<br />
for (;;) {<br />
//<br />
// Process a block.<br />
//<br />
fread(Info.aBlockSize, 1, 4, pFile);<br />
Info.BlockSize = SEGGER_RdU32LE(Info.aBlockSize);<br />
if (Info.BlockSize == 0) {<br />
break;<br />
}<br />
_Decompress(&Context, pFile, &Info);<br />
}<br />
//<br />
aStatus[0] = 0;<br />
// <br />
if (Info.FLG & FLG_CSIZE) {<br />
printf("%8llu %8llu ", Info.CalcCSize, SEGGER_RdU64LE(Info.aCSize));<br />
if (Info.CalcCSize != SEGGER_RdU64LE(Info.aCSize)) {<br />
strcat(aStatus, ", content size mismatch");<br />
}<br />
} else {<br />
printf("%8llu %8s ", Info.CalcCSize, "-");<br />
}<br />
//<br />
CX_DECODE_Exit(&Context);<br />
//<br />
CRC = _XXHASH_Get(&Info.Cksum);<br />
if (Info.FLG & FLG_CCHK) {<br />
fread(Info.aCRC, 1, 4, pFile);<br />
printf("%08X %08X ", CRC, SEGGER_RdU32LE(Info.aCRC));<br />
if (CRC != SEGGER_RdU32LE(Info.aCRC)) {<br />
strcat(aStatus, ", CRC mismatch");<br />
}<br />
} else {<br />
printf("%08X %8s ", CRC, "-");<br />
}<br />
if (fgetc(pFile) != EOF) {<br />
strcat(aStatus, ", junk at end of LZ4 file");<br />
}<br />
//<br />
if (aStatus[0] != 0) {<br />
printf("FAIL: %s\n", &aStatus[2]);<br />
return 100;<br />
} else {<br />
printf("OK (%s)\n", Info.FLG & FLG_BINDEP ? "Block independent" : "Block dependent");<br />
return 0;<br />
}<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* Public code<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* main()<br />
*<br />
* Function description<br />
* Application entry point.<br />
*<br />
* Parameters<br />
* argc - Argument count.<br />
* argv - Argument vector.<br />
*<br />
* Return value<br />
* Exit status.<br />
*/<br />
int main(int argc, char **argv) {<br />
FILE * pFile;<br />
int Status;<br />
//<br />
SEGGER_MEM_SYSTEM_HEAP_Init(&_StaticAllocator);<br />
//<br />
_PrintSignOn();<br />
if (argc != 2) {<br />
printf("Syntax: %s <filename>\n", argv[0]);<br />
exit(100);<br />
}<br />
//<br />
pFile = fopen(argv[1], "rb");<br />
if (pFile == NULL) {<br />
printf("%s: can't open '%s' for reading\n", argv[0], argv[1]);<br />
exit(100);<br />
}<br />
//<br />
Status = _DecodeFrame(pFile);<br />
fclose(pFile);<br />
exit(Status);<br />
}<br />
<br />
/*************************** End of file ****************************/<br />
</syntaxhighlight></div>
Paul
https://wiki.segger.com/index.php?title=HOWTO_decompress_a_gzip_archive&diff=14959
HOWTO decompress a gzip archive
2023-05-17T09:04:44Z
<p>Paul: </p>
<hr />
<div>emCompress-Pro provides the capability to decompress streams that are compressed in various formats, but it does not provide out-of-the-box container support.<br />
<br />
Recognizing that customers may possibly want to deal with encapsulated streams, this code can be used with emCompress-Pro to check the integrity of a a gzip archive that contains files compressed with the DEFLATE algorithm:<br />
<br />
<syntaxhighlight lang="c"><br />
/*********************************************************************<br />
* (c) SEGGER Microcontroller GmbH *<br />
* The Embedded Experts *<br />
* www.segger.com *<br />
**********************************************************************<br />
<br />
-------------------------- END-OF-HEADER -----------------------------<br />
<br />
File : CX_GZip.c<br />
Purpose : List the content of a gzip-compressed file.<br />
<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* #include Section<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
#include "CX_Int.h"<br />
#include "SEGGER_MEM.h"<br />
#include "SEGGER_UTIL.h"<br />
#include "SEGGER_CRC.h"<br />
#include <stdio.h><br />
#include <stdlib.h><br />
<br />
/*********************************************************************<br />
*<br />
* Defines, fixed<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
#define FTEXT 0x01<br />
#define FHCRC 0x02<br />
#define FEXTRA 0x04<br />
#define FNAME 0x08<br />
#define FCOMMENT 0x10<br />
<br />
/*********************************************************************<br />
*<br />
* Local types<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
typedef struct {<br />
U32 ISize;<br />
U32 CalcISize;<br />
U32 CRC;<br />
U32 CalcCRC;<br />
} MEMBER_INFO;<br />
<br />
/*********************************************************************<br />
*<br />
* Static data<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
static SEGGER_MEM_CONTEXT _StaticAllocator;<br />
<br />
/*********************************************************************<br />
*<br />
* Static code<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* _PrintSignOn()<br />
*<br />
* Function description<br />
* Displays the application's help information on stderr.<br />
*/<br />
static void _PrintSignOn(void) {<br />
printf("\n");<br />
printf("emCompress-Flex GZip Checker V%s ", CX_GetVersionText());<br />
printf("compiled " __DATE__ " " __TIME__ "\n");<br />
printf("%s www.segger.com\n\n", CX_GetCopyrightText());<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _DecompressBlocks()<br />
*<br />
* Function description<br />
* Decompress DEFLATE blocks.<br />
*<br />
* Parameters<br />
* pFile - Pointer to input file.<br />
* pInfo - Pointer to member information.<br />
*/<br />
static void _DecompressBlocks(FILE *pFile, MEMBER_INFO *pInfo) {<br />
CX_DECODE_CONTEXT C;<br />
CX_PARAS Paras;<br />
CX_STREAM Stream;<br />
int Status;<br />
U8 ByteIn;<br />
U8 ByteOut;<br />
int Overread;<br />
//<br />
Paras.WindowSize = 32768;<br />
Paras.MinLen = 3;<br />
Paras.MaxLen = 258;<br />
Paras.BlockLen = 0;<br />
//<br />
pInfo->ISize = 0;<br />
pInfo->CalcISize = 0;<br />
pInfo->CRC = 0;<br />
pInfo->CalcCRC = 0xFFFFFFFF;<br />
//<br />
Stream.AvailIn = 0;<br />
Stream.AvailOut = 0;<br />
CX_DECODE_Init(&C, &CX_DEFLATE_Decode, &_StaticAllocator, &Paras);<br />
for (;;) {<br />
if (Stream.AvailIn == 0) {<br />
if (fread(&ByteIn, 1, 1, pFile) > 0) {<br />
Stream.pIn = &ByteIn;<br />
Stream.AvailIn = 1;<br />
}<br />
}<br />
Stream.pOut = &ByteOut;<br />
Stream.AvailOut = 1;<br />
//<br />
Status = CX_DECODE_Process(&C, &Stream, feof(pFile) ? CX_FLUSH_END : CX_FLUSH_NONE);<br />
if (Status < 0) {<br />
printf("%s\n", CX_GetErrorText(Status));<br />
exit(100);<br />
}<br />
if (Stream.AvailOut == 0) {<br />
pInfo->CalcISize++;<br />
pInfo->CalcCRC = SEGGER_CRC_Calc_EDB88320(&ByteOut, 1, pInfo->CalcCRC);<br />
}<br />
if (Status == 1) {<br />
break;<br />
}<br />
}<br />
//<br />
pInfo->CalcCRC = ~pInfo->CalcCRC;<br />
//<br />
Overread = CX_DECODE_GetBufferLen(&C) + Stream.AvailIn;<br />
fseek(pFile, -Overread, SEEK_CUR);<br />
//<br />
CX_DECODE_Exit(&C);<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _PrintListing()<br />
*<br />
* Function description<br />
* Displays the content of a file, ensures compressed data<br />
* can be decompressed.<br />
*<br />
* Parameters<br />
* pFile - Pointer to input file.<br />
*<br />
* Syntax<br />
* From [RFC 1952], each member has the following structure:<br />
*<br />
* +---+---+---+---+---+---+---+---+---+---+<br />
* |ID1|ID2|CM |FLG| MTIME |XFL|OS | (more-->)<br />
* +---+---+---+---+---+---+---+---+---+---+<br />
*<br />
* (if FLG.FEXTRA set)<br />
*<br />
* +---+---+=================================+<br />
* | XLEN |...XLEN bytes of "extra field"...| (more-->)<br />
* +---+---+=================================+<br />
*<br />
* (if FLG.FNAME set)<br />
*<br />
* +=========================================+<br />
* |...original file name, zero-terminated...| (more-->)<br />
* +=========================================+<br />
*<br />
* (if FLG.FCOMMENT set)<br />
*<br />
* +===================================+<br />
* |...file comment, zero-terminated...| (more-->)<br />
* +===================================+<br />
*<br />
* (if FLG.FHCRC set)<br />
*<br />
* +---+---+<br />
* | CRC16 |<br />
* +---+---+<br />
*<br />
* +=======================+<br />
* |...compressed blocks...| (more-->)<br />
* +=======================+<br />
*<br />
* 0 1 2 3 4 5 6 7<br />
* +---+---+---+---+---+---+---+---+<br />
* | CRC32 | ISIZE |<br />
* +---+---+---+---+---+---+---+---+<br />
*/<br />
static void _PrintListing(FILE *pFile) {<br />
MEMBER_INFO Info;<br />
U8 aHeader[10];<br />
U8 aCRC[4];<br />
U8 aISize[4];<br />
char aName[256];<br />
char c;<br />
unsigned i;<br />
//<br />
printf(" Size CRC\n");<br />
printf("File name Computed Stored Computed Stored Status\n");<br />
printf("------------------- -------- -------- -------- -------- -----------\n");<br />
// <br />
for (;;) {<br />
//<br />
fread(aHeader, 1, sizeof(aHeader), pFile);<br />
if (feof(pFile)) {<br />
return;<br />
}<br />
if (ferror(pFile)) {<br />
perror("Can't read input file");<br />
exit(100);<br />
}<br />
//<br />
if (aHeader[0] != 0x1F || aHeader[1]!= 0x8B) {<br />
printf("Incorrect ID bytes for a gzip file\n");<br />
exit(100);<br />
}<br />
if (aHeader[2] != 0x08) {<br />
printf("Compression method is not DEFLATE\n");<br />
exit(100);<br />
}<br />
//<br />
if (aHeader[3] & FEXTRA) {<br />
fseek(pFile, aHeader[8], SEEK_CUR);<br />
}<br />
if (aHeader[3] & FNAME) {<br />
i = 0;<br />
do {<br />
fread(&c, 1, 1, pFile);<br />
if (i < sizeof(aName)) {<br />
aName[i++] = c;<br />
}<br />
} while (c != 0);<br />
aName[sizeof(aName)-1] = '\0';<br />
} else {<br />
strcpy(aName, "<stdin>");<br />
}<br />
if (aHeader[3] & FCOMMENT) {<br />
do {<br />
fread(&c, 1, 1, pFile);<br />
} while (c != 0);<br />
aName[sizeof(aName)-1] = '\0';<br />
}<br />
if (aHeader[3] & FHCRC) {<br />
fread(&c, 1, 1, pFile);<br />
fread(&c, 1, 1, pFile);<br />
}<br />
//<br />
_DecompressBlocks(pFile, &Info);<br />
//<br />
fread(aCRC, 1, 4, pFile);<br />
fread(aISize, 1, 4, pFile);<br />
Info.CRC = SEGGER_RdU32LE(aCRC);<br />
Info.ISize = SEGGER_RdU32LE(aISize);<br />
//<br />
printf("%-20s %8u %8u %08X %08X ",<br />
aName,<br />
Info.ISize,<br />
Info.CalcISize,<br />
Info.CRC,<br />
Info.CalcCRC);<br />
if (Info.ISize == Info.CalcISize && Info.CRC == Info.CalcCRC) {<br />
printf("OK\n");<br />
} else {<br />
printf("Mismatch\n");<br />
exit(100);<br />
}<br />
}<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* Public code<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* main()<br />
*<br />
* Function description<br />
* Application entry point.<br />
*<br />
* Parameters<br />
* argc - Argument count.<br />
* argv - Argument vector.<br />
*<br />
* Return value<br />
* Exit status.<br />
*/<br />
int main(int argc, char **argv) {<br />
FILE *pFile;<br />
//<br />
SEGGER_MEM_SYSTEM_HEAP_Init(&_StaticAllocator);<br />
//<br />
_PrintSignOn();<br />
if (argc != 2) {<br />
printf("Syntax: %s <filename>\n", argv[0]);<br />
exit(100);<br />
}<br />
//<br />
pFile = fopen(argv[1], "rb");<br />
if (pFile == NULL) {<br />
printf("%s: can't open '%s' for reading\n", argv[0], argv[1]);<br />
exit(100);<br />
}<br />
//<br />
_PrintListing(pFile);<br />
fclose(pFile);<br />
exit(0);<br />
}<br />
<br />
/*************************** End of file ****************************/<br />
</syntaxhighlight></div>
Paul
https://wiki.segger.com/index.php?title=HOWTO_decompress_a_Zip_archive&diff=14958
HOWTO decompress a Zip archive
2023-05-17T09:03:59Z
<p>Paul: </p>
<hr />
<div>emCompress-Pro provides the capability to decompress streams that are compressed in various formats, but it does not provide out-of-the-box container support.<br />
<br />
Recognizing that customers may possibly want to deal with encapsulated streams, this code can be used with emCompress-Pro to check the integrity of a a Zip archive that contains files compressed with the DEFLATE algorithm or the LZMA algorithm:<br />
<br />
<syntaxhighlight lang="c"><br />
/*********************************************************************<br />
* (c) SEGGER Microcontroller GmbH *<br />
* The Embedded Experts *<br />
* www.segger.com *<br />
**********************************************************************<br />
<br />
-------------------------- END-OF-HEADER -----------------------------<br />
<br />
File : CX_Zip.c<br />
Purpose : Display content of a zip-compressed file.<br />
<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* #include Section<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
#include "CX_Int.h"<br />
#include "SEGGER_MEM.h"<br />
#include "SEGGER_UTIL.h"<br />
#include "SEGGER_CRC.h"<br />
#include <stdio.h><br />
#include <stdlib.h><br />
<br />
/*********************************************************************<br />
*<br />
* Local types<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
typedef struct {<br />
U32 ISize; // Input plain file size from local file header<br />
U32 CalcISize; // Calculated input plain file size from decompressed data<br />
U32 OSize; // Output compressed file size from local file header<br />
U32 CRC; // Input plain file CRC from local file header<br />
U32 CalcCRC; // Calculated input plain file CRC from decompressed data<br />
char aName[32]; // Name of file from local file header<br />
char aStatus[32]; // Additional information from decoder<br />
U8 aProperties[13];<br />
} MEMBER_INFO;<br />
<br />
typedef struct {<br />
U8 aSignature [4];<br />
U8 aVersion [2];<br />
U8 aFlags [2];<br />
U8 aCompression [2];<br />
U8 aModTime [2];<br />
U8 aModDate [2];<br />
U8 aCRC [4];<br />
U8 aCompressedSize [4];<br />
U8 aUncompressedSize [4];<br />
U8 aFileNameLen [2];<br />
U8 aExtraFieldLen [2];<br />
} ZIP_LOCAL_HEADER;<br />
<br />
/*********************************************************************<br />
*<br />
* Static const data<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* Static data<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
static SEGGER_MEM_CONTEXT _StaticAllocator;<br />
<br />
/*********************************************************************<br />
*<br />
* Static code<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* _PrintSignOn()<br />
*<br />
* Function description<br />
* Displays the application's help information on stderr.<br />
*/<br />
static void _PrintSignOn(void) {<br />
printf("\n");<br />
printf("emCompress-Flex Zip Checker V%s ", CX_GetVersionText());<br />
printf("compiled " __DATE__ " " __TIME__ "\n");<br />
printf("%s www.segger.com\n\n", CX_GetCopyrightText());<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _DecompressBlocks()<br />
*<br />
* Function description<br />
* Decompress DEFLATE or LZMA blocks.<br />
*<br />
* Parameters<br />
* pFile - Pointer to input file.<br />
* pAPI - Pointer to decompression API.<br />
* pParas - Pointer to decompression parameters.<br />
* pInfo - Pointer to member information.<br />
*/<br />
static void _DecompressBlocks( FILE * pFile,<br />
const CX_DECODE_API * pAPI,<br />
const CX_PARAS * pParas,<br />
MEMBER_INFO * pInfo) {<br />
CX_DECODE_CONTEXT C;<br />
CX_STREAM Stream;<br />
int Status;<br />
U8 ByteIn;<br />
U8 ByteOut;<br />
//<br />
pInfo->CalcISize = 0;<br />
pInfo->CalcCRC = 0xFFFFFFFF;<br />
//<br />
Stream.AvailIn = 0;<br />
Stream.AvailOut = 0;<br />
Status = CX_DECODE_Init(&C, pAPI, &_StaticAllocator, pParas);<br />
if (Status < 0) {<br />
printf("Can't instantiate decompressor!\n");<br />
exit(100);<br />
}<br />
for (;;) {<br />
if (Stream.AvailIn == 0 && pInfo->OSize > 0) {<br />
fread(&ByteIn, 1, 1, pFile);<br />
Stream.pIn = &ByteIn;<br />
Stream.AvailIn = 1;<br />
pInfo->OSize--;<br />
}<br />
Stream.pOut = &ByteOut;<br />
Stream.AvailOut = 1;<br />
//<br />
Status = CX_DECODE_Process(&C, &Stream, pInfo->OSize == 0 ? CX_FLUSH_END : CX_FLUSH_NONE);<br />
if (Status < 0) {<br />
printf("%s\n", CX_GetErrorText(Status));<br />
exit(100);<br />
}<br />
if (Stream.AvailOut == 0) {<br />
pInfo->CalcISize++;<br />
pInfo->CalcCRC = SEGGER_CRC_Calc_EDB88320(&ByteOut, 1, pInfo->CalcCRC);<br />
}<br />
if (Status == 1) {<br />
break;<br />
}<br />
}<br />
//<br />
pInfo->CalcCRC = ~pInfo->CalcCRC;<br />
//<br />
CX_DECODE_Exit(&C);<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* _PrintListing()<br />
*<br />
* Function description<br />
* Displays the content of a file, ensures compressed data<br />
* can be decompressed.<br />
*<br />
* Parameters<br />
* pFile - Pointer to input file.<br />
*/<br />
static void _PrintListing(FILE *pFile) {<br />
ZIP_LOCAL_HEADER Header;<br />
MEMBER_INFO Info;<br />
CX_PARAS Paras;<br />
char c;<br />
unsigned i;<br />
unsigned p;<br />
unsigned Len;<br />
//<br />
printf(" Size CRC\n");<br />
printf("File name Computed Stored Computed Stored Status\n");<br />
printf("------------------- -------- -------- -------- -------- -----------\n");<br />
//<br />
for (;;) {<br />
//<br />
fread(&Header, 1, sizeof(Header), pFile);<br />
if (feof(pFile)) {<br />
return;<br />
}<br />
if (ferror(pFile)) {<br />
perror("Can't read input file");<br />
exit(100);<br />
}<br />
//<br />
if (SEGGER_RdU32BE(&Header.aSignature[0]) == 0x504B0304) {<br />
// Local header<br />
} else if (SEGGER_RdU32BE(&Header.aSignature[0]) == 0x504B0102) {<br />
// Central directory<br />
break;<br />
} else {<br />
printf("Incorrect ID bytes for a zip file\n");<br />
exit(100);<br />
}<br />
if (SEGGER_RdU16LE(&Header.aCompression[0]) != 0x08 &&<br />
SEGGER_RdU16LE(&Header.aCompression[0]) != 0x0E &&<br />
SEGGER_RdU16LE(&Header.aCompression[0]) != 0x00) {<br />
printf("Compression method is not DEFLATE, LZMA, or STORED\n");<br />
exit(100);<br />
}<br />
//<br />
Info.ISize = SEGGER_RdU32LE(&Header.aUncompressedSize[0]);<br />
Info.OSize = SEGGER_RdU32LE(&Header.aCompressedSize[0]);<br />
Info.CRC = SEGGER_RdU32LE(&Header.aCRC[0]);<br />
//<br />
i = 0;<br />
p = 0;<br />
Len = SEGGER_RdU16LE(&Header.aFileNameLen[0]);<br />
for (i = 0; i < Len; ++i) {<br />
fread(&c, 1, 1, pFile);<br />
if (p < sizeof(Info.aName)-1) {<br />
Info.aName[p++] = c;<br />
Info.aName[p] = 0;<br />
}<br />
if (c == '/') {<br />
p = 0;<br />
}<br />
}<br />
Info.aName[SEGGER_MIN(Len, sizeof(Info.aName)-1)] = '\0';<br />
Info.aStatus[0] = 0;<br />
//<br />
fseek(pFile, SEGGER_RdU16LE(&Header.aExtraFieldLen[0]), SEEK_CUR);<br />
//<br />
if (SEGGER_RdU16LE(&Header.aCompression[0]) == 0x08) {<br />
//<br />
// DEFLATE algorithm.<br />
//<br />
memset(&Paras, 0, sizeof(Paras));<br />
Paras.WindowSize = 32768;<br />
Paras.MinLen = 3;<br />
Paras.MaxLen = 258;<br />
sprintf(Info.aStatus, " (DEFLATE)");<br />
_DecompressBlocks(pFile, &CX_DEFLATE_Decode, &Paras, &Info);<br />
} else if (SEGGER_RdU16LE(&Header.aCompression[0]) == 0x0E) {<br />
U8 aVersion[2];<br />
U8 aPropertiesSize[2];<br />
//<br />
// LZMA algorithm. This uses a header scheme similar to<br />
// LZMA-alone, the header control byte is stored along<br />
// with the woindow size.<br />
//<br />
fread(aVersion, 1, 2, pFile);<br />
fread(aPropertiesSize, 1, 2, pFile);<br />
if (SEGGER_RdU16LE(aPropertiesSize) != 5) {<br />
printf("Unexpected property size for LZMA\n");<br />
exit(100);<br />
}<br />
memset(Info.aProperties, 0, sizeof(Info.aProperties));<br />
fread(Info.aProperties, 1, 5, pFile);<br />
//<br />
memset(&Paras, 0, sizeof(Paras));<br />
Paras.MinLen = 2;<br />
Paras.MaxLen = 273;<br />
Paras.WindowSize = SEGGER_RdU32LE(&Info.aProperties[1]);<br />
if (CX_LZMA_DECODE_UnpackControlByte(&Paras, Info.aProperties[0]) < 0) {<br />
printf("Bad LZMA properties byte\n");<br />
exit(100);<br />
}<br />
sprintf(Info.aStatus, " (LZMA with LC=%u, LP=%u, PB=%u)", Paras.P1, Paras.P2, Paras.P3);<br />
Info.OSize -= 9; // Remove aVersion, aPropertiesSize, and aProperties from encoded size<br />
_DecompressBlocks(pFile, &CX_LZMA_Decode, &Paras, &Info);<br />
} else {<br />
Info.CalcCRC = 0;<br />
Info.CalcISize = 0;<br />
fseek(pFile, SEGGER_RdU32LE(&Header.aCompressedSize[0]), SEEK_CUR);<br />
}<br />
//<br />
printf("%-20s %8u %8u %08X %08X ",<br />
Info.aName,<br />
Info.CalcISize,<br />
Info.ISize,<br />
Info.CalcCRC,<br />
Info.CRC);<br />
if (Info.ISize == Info.CalcISize && Info.CRC == Info.CalcCRC) {<br />
printf("OK%s\n", Info.aStatus);<br />
} else {<br />
printf("Mismatch\n");<br />
exit(100);<br />
}<br />
}<br />
}<br />
<br />
/*********************************************************************<br />
*<br />
* Public code<br />
*<br />
**********************************************************************<br />
*/<br />
<br />
/*********************************************************************<br />
*<br />
* main()<br />
*<br />
* Function description<br />
* Application entry point.<br />
*<br />
* Parameters<br />
* argc - Argument count.<br />
* argv - Argument vector.<br />
*<br />
* Return value<br />
* Exit status.<br />
*/<br />
int main(int argc, char **argv) {<br />
FILE *pFile;<br />
//<br />
SEGGER_MEM_SYSTEM_HEAP_Init(&_StaticAllocator);<br />
//<br />
_PrintSignOn();<br />
if (argc != 2) {<br />
printf("Syntax: %s <filename>\n", argv[0]);<br />
exit(100);<br />
}<br />
//<br />
pFile = fopen(argv[1], "rb");<br />
if (pFile == NULL) {<br />
printf("%s: can't open '%s' for reading\n", argv[0], argv[1]);<br />
exit(100);<br />
}<br />
//<br />
_PrintListing(pFile);<br />
fclose(pFile);<br />
exit(0);<br />
}<br />
<br />
/*************************** End of file ****************************/<br />
</syntaxhighlight></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10619
emFloat
2021-09-03T16:39:10Z
<p>Paul: </p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
The following table summarizes the benchmarks for floating-point arithmetic and conversion<br />
when forced to use only scalar, integer instructions in the RISC-V core, even if the core<br />
implementation provides the single-precision (F) or double-precision (D) instruction set extension.<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Speed|Results]]<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Balanced|Results]]<br />
|-<br />
| Arty A7-100T || RV32IMAFC_Zba_Zbb || SiFive E76 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_Arty_A7_100T_E76_2p6p0_Speed|Results]]<br />
|-<br />
| Arty A7-100T || RV32IMAFC_Zba_Zbb || SiFive E76 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_Arty_A7_100T_E76_2p6p0_Balanced|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10618
emFloat
2021-09-03T16:38:51Z
<p>Paul: </p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
The following table summarizes the benchmarks for floating-point arithmetic and conversion<br />
when forced to use only scalar, integer instructions in the RISC-V core, even if the core<br />
implementation has the single-precision (F) or double-precision (D) instruction set extension.<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Speed|Results]]<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Balanced|Results]]<br />
|-<br />
| Arty A7-100T || RV32IMAFC_Zba_Zbb || SiFive E76 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_Arty_A7_100T_E76_2p6p0_Speed|Results]]<br />
|-<br />
| Arty A7-100T || RV32IMAFC_Zba_Zbb || SiFive E76 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_Arty_A7_100T_E76_2p6p0_Balanced|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_Arty_A7_100T_E76_2p6p0_Speed&diff=10617
Bench Arith Arty A7 100T E76 2p6p0 Speed
2021-09-03T16:35:37Z
<p>Paul: </p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: Arty A7-100T E76<br />
Target: RV32IMAC_Zba_Zbb<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 2<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 21 45 30.0 Random distribution over (0, 1), operands differ<br />
__subsf3 14 42 24.7 Random distribution over (0, 1), operands differ<br />
__mulsf3 16 37 23.5 Random distribution over (0, 1), operands differ<br />
__divsf3 44 51 47.5 Random distribution over (0, 1), operands differ<br />
__ltsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__lesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__nesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__adddf3 32 56 40.8 Random distribution over (0, 1), operands differ<br />
__subdf3 34 76 46.6 Random distribution over (0, 1), operands differ<br />
__muldf3 39 48 42.9 Random distribution over (0, 1), operands differ<br />
__divdf3 140 148 142.4 Random distribution over (0, 1), operands differ<br />
__ltdf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__ledf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__gedf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 19 19 19.0 Random distribution over (1..2^31)<br />
__fixsfdi 15 17 16.0 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 20 22 21.0 Random distribution over (-2^63..2^63)<br />
__floatsisf 18 20 18.3 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 19 28 26.0 Random distribution over (1..2^31)<br />
__floatdisf 17 25 19.6 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 23 27 23.8 Random distribution over (-2^63..2^63)<br />
__fixdfsi 8 15 12.9 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 13 18 16.3 Random distribution over (1..2^31)<br />
__fixdfdi 0 19 14.0 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 17 12.0 Random distribution over (-2^63..2^63)<br />
__floatsidf 13 13 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 17 17 17.0 Random distribution over (1..2^31)<br />
__floatdidf 13 26 19.3 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 19 28 23.3 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 10 17 13.5 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_Arty_A7_100T_E76_2p6p0_Balanced&diff=10616
Bench Arith Arty A7 100T E76 2p6p0 Balanced
2021-09-03T16:35:22Z
<p>Paul: </p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: Arty A7-100T<br />
Target: RV32IMAC_Zba_Zbb<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 0<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 21 47 29.8 Random distribution over (0, 1), operands differ<br />
__subsf3 14 40 24.7 Random distribution over (0, 1), operands differ<br />
__mulsf3 16 31 21.9 Random distribution over (0, 1), operands differ<br />
__divsf3 44 51 47.5 Random distribution over (0, 1), operands differ<br />
__ltsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__lesf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__gesf2 23 23 23.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__nesf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__adddf3 32 53 40.8 Random distribution over (0, 1), operands differ<br />
__subdf3 47 91 57.3 Random distribution over (0, 1), operands differ<br />
__muldf3 47 59 51.5 Random distribution over (0, 1), operands differ<br />
__divdf3 125 143 135.4 Random distribution over (0, 1), operands differ<br />
__ltdf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__ledf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__gedf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 19 19 19.0 Random distribution over (1..2^31)<br />
__fixsfdi 15 17 16.0 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 20 22 21.0 Random distribution over (-2^63..2^63)<br />
__floatsisf 18 20 18.3 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 19 26 25.0 Random distribution over (1..2^31)<br />
__floatdisf 17 26 19.8 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 23 27 23.6 Random distribution over (-2^63..2^63)<br />
__fixdfsi 8 15 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 13 25 16.9 Random distribution over (1..2^31)<br />
__fixdfdi 0 19 13.9 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 17 12.0 Random distribution over (-2^63..2^63)<br />
__floatsidf 13 13 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 17 17 17.0 Random distribution over (1..2^31)<br />
__floatdidf 13 29 19.5 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 19 28 23.3 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 10 17 13.5 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_Arty_A7_100T_E76_2p6p0_Balanced&diff=10615
Bench Arith Arty A7 100T E76 2p6p0 Balanced
2021-09-03T16:31:08Z
<p>Paul: Created page with " <nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emRun v2.26.0 + emFloat v2.6.0 Target: Arty A7-100T Target: R..."</p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: Arty A7-100T<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 0<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 21 47 29.8 Random distribution over (0, 1), operands differ<br />
__subsf3 14 40 24.7 Random distribution over (0, 1), operands differ<br />
__mulsf3 16 31 21.9 Random distribution over (0, 1), operands differ<br />
__divsf3 44 51 47.5 Random distribution over (0, 1), operands differ<br />
__ltsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__lesf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__gesf2 23 23 23.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__nesf2 22 22 22.0 Random distribution over (0, 1), operands differ<br />
__adddf3 32 53 40.8 Random distribution over (0, 1), operands differ<br />
__subdf3 47 91 57.3 Random distribution over (0, 1), operands differ<br />
__muldf3 47 59 51.5 Random distribution over (0, 1), operands differ<br />
__divdf3 125 143 135.4 Random distribution over (0, 1), operands differ<br />
__ltdf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__ledf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__gedf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 19 19 19.0 Random distribution over (1..2^31)<br />
__fixsfdi 15 17 16.0 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 20 22 21.0 Random distribution over (-2^63..2^63)<br />
__floatsisf 18 20 18.3 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 19 26 25.0 Random distribution over (1..2^31)<br />
__floatdisf 17 26 19.8 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 23 27 23.6 Random distribution over (-2^63..2^63)<br />
__fixdfsi 8 15 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 13 25 16.9 Random distribution over (1..2^31)<br />
__fixdfdi 0 19 13.9 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 17 12.0 Random distribution over (-2^63..2^63)<br />
__floatsidf 13 13 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 17 17 17.0 Random distribution over (1..2^31)<br />
__floatdidf 13 29 19.5 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 19 28 23.3 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 10 17 13.5 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10614
emFloat
2021-09-03T16:30:42Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Speed|Results]]<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Balanced|Results]]<br />
|-<br />
| Arty A7-100T || RV32IMAFC_Zba_Zbb || SiFive E76 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_Arty_A7_100T_E76_2p6p0_Speed|Results]]<br />
|-<br />
| Arty A7-100T || RV32IMAFC_Zba_Zbb || SiFive E76 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_Arty_A7_100T_E76_2p6p0_Balanced|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_Arty_A7_100T_E76_2p6p0_Speed&diff=10613
Bench Arith Arty A7 100T E76 2p6p0 Speed
2021-09-03T16:27:41Z
<p>Paul: Created page with " <nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emRun v2.26.0 + emFloat v2.6.0 Target: Arty A7-100T E76 Targe..."</p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: Arty A7-100T E76<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 2<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 21 45 30.0 Random distribution over (0, 1), operands differ<br />
__subsf3 14 42 24.7 Random distribution over (0, 1), operands differ<br />
__mulsf3 16 37 23.5 Random distribution over (0, 1), operands differ<br />
__divsf3 44 51 47.5 Random distribution over (0, 1), operands differ<br />
__ltsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__lesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__nesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__adddf3 32 56 40.8 Random distribution over (0, 1), operands differ<br />
__subdf3 34 76 46.6 Random distribution over (0, 1), operands differ<br />
__muldf3 39 48 42.9 Random distribution over (0, 1), operands differ<br />
__divdf3 140 148 142.4 Random distribution over (0, 1), operands differ<br />
__ltdf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__ledf2 7 17 10.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__gedf2 7 15 10.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__eqdf2 7 12 9.5 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 19 19 19.0 Random distribution over (1..2^31)<br />
__fixsfdi 15 17 16.0 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 20 22 21.0 Random distribution over (-2^63..2^63)<br />
__floatsisf 18 20 18.3 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 19 28 26.0 Random distribution over (1..2^31)<br />
__floatdisf 17 25 19.6 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 23 27 23.8 Random distribution over (-2^63..2^63)<br />
__fixdfsi 8 15 12.9 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 13 18 16.3 Random distribution over (1..2^31)<br />
__fixdfdi 0 19 14.0 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 17 12.0 Random distribution over (-2^63..2^63)<br />
__floatsidf 13 13 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 17 17 17.0 Random distribution over (1..2^31)<br />
__floatdidf 13 26 19.3 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 19 28 23.3 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 10 17 13.5 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10612
emFloat
2021-09-03T16:26:59Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Speed|Results]]<br />
|-<br />
| FE310-G002 || RV32IMAC || SiFive E310-G002 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Balanced|Results]]<br />
|-<br />
| Arty A7-100T || RV32IMAFC_Zba_Zbb || SiFive E76 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_Arty_A7_100T_E76_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_xv5 || Andes N25F || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_FE310-G002_2p6p0_Balanced&diff=10611
Bench Arith FE310-G002 2p6p0 Balanced
2021-09-03T16:02:52Z
<p>Paul: </p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: FE310-G002<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 0<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 37 55 42.8 Random distribution over (0, 1), operands differ<br />
__subsf3 32 70 47.0 Random distribution over (0, 1), operands differ<br />
__mulsf3 42 49 43.9 Random distribution over (0, 1), operands differ<br />
__divsf3 81 81 81.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__nesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__adddf3 43 70 54.1 Random distribution over (0, 1), operands differ<br />
__subdf3 49 113 69.6 Random distribution over (0, 1), operands differ<br />
__muldf3 92 107 97.3 Random distribution over (0, 1), operands differ<br />
__divdf3 235 271 254.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 13 24 14.0 Random distribution over (0, 1), operands differ<br />
__ledf2 13 25 14.0 Random distribution over (0, 1), operands differ<br />
__gtdf2 13 21 13.9 Random distribution over (0, 1), operands differ<br />
__gedf2 13 25 15.2 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 20 14.1 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 12 12 12.0 Random distribution over (1..2^31)<br />
__fixsfdi 15 25 18.5 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 14 29 16.1 Random distribution over (-2^63..2^63)<br />
__floatsisf 28 41 32.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 22 29 25.9 Random distribution over (1..2^31)<br />
__floatdisf 31 62 41.2 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 27 52 36.3 Random distribution over (-2^63..2^63)<br />
__fixdfsi 7 27 17.2 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 5 24 13.0 Random distribution over (1..2^31)<br />
__fixdfdi 10 30 24.4 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 23 20.3 Random distribution over (-2^63..2^63)<br />
__floatsidf 23 42 30.2 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 18 36 24.5 Random distribution over (1..2^31)<br />
__floatdidf 22 59 38.3 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 18 62 33.5 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 19 12.1 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 25 28 25.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_FE310-G002_2p6p0_Balanced&diff=10610
Bench Arith FE310-G002 2p6p0 Balanced
2021-09-03T16:02:42Z
<p>Paul: Created page with "<nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emRun v2.26.0 + emFloat v2.6.0 Target: FE310-G002 Target: RV32..."</p>
<hr />
<div><nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: FE310-G002<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 0<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 37 55 42.8 Random distribution over (0, 1), operands differ<br />
__subsf3 32 70 47.0 Random distribution over (0, 1), operands differ<br />
__mulsf3 42 49 43.9 Random distribution over (0, 1), operands differ<br />
__divsf3 81 81 81.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__gesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__nesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__adddf3 43 70 54.1 Random distribution over (0, 1), operands differ<br />
__subdf3 49 113 69.6 Random distribution over (0, 1), operands differ<br />
__muldf3 92 107 97.3 Random distribution over (0, 1), operands differ<br />
__divdf3 235 271 254.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 13 24 14.0 Random distribution over (0, 1), operands differ<br />
__ledf2 13 25 14.0 Random distribution over (0, 1), operands differ<br />
__gtdf2 13 21 13.9 Random distribution over (0, 1), operands differ<br />
__gedf2 13 25 15.2 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 20 14.1 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 12 12 12.0 Random distribution over (1..2^31)<br />
__fixsfdi 15 25 18.5 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 14 29 16.1 Random distribution over (-2^63..2^63)<br />
__floatsisf 28 41 32.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 22 29 25.9 Random distribution over (1..2^31)<br />
__floatdisf 31 62 41.2 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 27 52 36.3 Random distribution over (-2^63..2^63)<br />
__fixdfsi 7 27 17.2 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 5 24 13.0 Random distribution over (1..2^31)<br />
__fixdfdi 10 30 24.4 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 23 20.3 Random distribution over (-2^63..2^63)<br />
__floatsidf 23 42 30.2 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 18 36 24.5 Random distribution over (1..2^31)<br />
__floatdidf 22 59 38.3 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 18 62 33.5 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 19 12.1 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 25 28 25.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10609
emFloat
2021-09-03T15:59:27Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| FE310-G002|| RV32IMAC || SiFive E310-G002 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Speed|Results]]<br />
|-<br />
| FE310-G002|| RV32IMAC || SiFive E310-G002 || 2.6.0 || Balanced || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Balanced|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes N25F || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes N25F || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_FE310-G002_2p6p0_Speed&diff=10608
Bench Arith FE310-G002 2p6p0 Speed
2021-09-03T15:58:58Z
<p>Paul: Created page with " <nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emRun v2.26.0 + emFloat v2.6.0 Target: FE310-G002 Target: RV3..."</p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: FE310-G002<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 2<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 37 56 42.9 Random distribution over (0, 1), operands differ<br />
__subsf3 32 76 47.0 Random distribution over (0, 1), operands differ<br />
__mulsf3 42 58 43.9 Random distribution over (0, 1), operands differ<br />
__divsf3 81 81 81.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 12 12 12.0 Random distribution over (0, 1), operands differ<br />
__lesf2 11 15 11.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__gesf2 12 16 12.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 11 18 11.0 Random distribution over (0, 1), operands differ<br />
__nesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__adddf3 43 72 54.1 Random distribution over (0, 1), operands differ<br />
__subdf3 49 113 69.5 Random distribution over (0, 1), operands differ<br />
__muldf3 92 107 97.3 Random distribution over (0, 1), operands differ<br />
__divdf3 302 309 305.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 14 20 14.4 Random distribution over (0, 1), operands differ<br />
__ledf2 14 19 14.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 14 18 14.6 Random distribution over (0, 1), operands differ<br />
__gedf2 14 15 14.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 12 12 12.0 Random distribution over (1..2^31)<br />
__fixsfdi 15 24 18.0 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 14 19 17.4 Random distribution over (-2^63..2^63)<br />
__floatsisf 28 41 31.5 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 24 44 30.2 Random distribution over (1..2^31)<br />
__floatdisf 28 69 39.1 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 25 51 35.3 Random distribution over (-2^63..2^63)<br />
__fixdfsi 6 19 15.7 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 6 17 13.8 Random distribution over (1..2^31)<br />
__fixdfdi 7 31 24.8 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 25 20.9 Random distribution over (-2^63..2^63)<br />
__floatsidf 23 42 29.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 19 31 23.7 Random distribution over (1..2^31)<br />
__floatdidf 21 59 37.3 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 20 52 34.5 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 25 33 28.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10607
emFloat
2021-09-03T15:57:56Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| FE310-G002|| RV32IMAC || SiFive E310-G002 || 2.6.0 || Speed || Run from ITIM, data in DTIM || [[Bench_Arith_FE310-G002_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes N25F || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes N25F || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10606
emFloat
2021-09-03T15:47:01Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei Bumblebee || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes N25F || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes N25F || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_TLSR9518A_2p6p0_Balanced&diff=10605
Bench Arith TLSR9518A 2p6p0 Balanced
2021-09-03T15:40:22Z
<p>Paul: </p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: TLSF9518A<br />
Target: RV32IMACP<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 0<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With RISC-V SIMD acceleration<br />
Config: With Andes V5 Performance Extension acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 33 50 38.8 Random distribution over (0, 1), operands differ<br />
__subsf3 25 59 39.6 Random distribution over (0, 1), operands differ<br />
__mulsf3 28 37 30.0 Random distribution over (0, 1), operands differ<br />
__divsf3 58 58 58.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__gesf2 12 12 12.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__nesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__adddf3 38 68 50.3 Random distribution over (0, 1), operands differ<br />
__subdf3 43 97 66.1 Random distribution over (0, 1), operands differ<br />
__muldf3 52 75 60.4 Random distribution over (0, 1), operands differ<br />
__divdf3 132 161 150.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 13 21 13.4 Random distribution over (0, 1), operands differ<br />
__ledf2 13 25 13.8 Random distribution over (0, 1), operands differ<br />
__gtdf2 14 20 14.7 Random distribution over (0, 1), operands differ<br />
__gedf2 14 22 14.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 10 13 12.8 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 8 11 9.9 Random distribution over (1..2^31)<br />
__fixsfdi 13 24 15.6 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 9 16 11.0 Random distribution over (-2^63..2^63)<br />
__floatsisf 17 23 17.7 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 13 19 13.7 Random distribution over (1..2^31)<br />
__floatdisf 21 37 24.8 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 19 26 21.0 Random distribution over (-2^63..2^63)<br />
__fixdfsi 6 25 15.1 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 2 17 11.5 Random distribution over (1..2^31)<br />
__fixdfdi 10 37 27.3 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 4 20 17.5 Random distribution over (-2^63..2^63)<br />
__floatsidf 11 14 12.4 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 4 4 4.0 Random distribution over (1..2^31)<br />
__floatdidf 13 29 19.7 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 8 18 12.8 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 9 9 9.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 19 19 19.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_TLSR9518A_2p6p0_Speed&diff=10604
Bench Arith TLSR9518A 2p6p0 Speed
2021-09-03T15:39:49Z
<p>Paul: Created page with " <nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emRun v2.26.0 + emFloat v2.6.0 Target: TLSF9518A Target: RV32..."</p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: TLSF9518A<br />
Target: RV32IMACP<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 2<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With RISC-V SIMD acceleration<br />
Config: With Andes V5 Performance Extension acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 33 50 38.8 Random distribution over (0, 1), operands differ<br />
__subsf3 25 59 39.6 Random distribution over (0, 1), operands differ<br />
__mulsf3 28 37 30.0 Random distribution over (0, 1), operands differ<br />
__divsf3 58 58 58.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__gesf2 12 12 12.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__nesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__adddf3 38 68 50.3 Random distribution over (0, 1), operands differ<br />
__subdf3 43 97 66.1 Random distribution over (0, 1), operands differ<br />
__muldf3 52 75 60.4 Random distribution over (0, 1), operands differ<br />
__divdf3 132 161 150.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 13 21 13.4 Random distribution over (0, 1), operands differ<br />
__ledf2 13 25 13.8 Random distribution over (0, 1), operands differ<br />
__gtdf2 14 20 14.7 Random distribution over (0, 1), operands differ<br />
__gedf2 14 22 14.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 10 13 12.8 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 8 11 9.9 Random distribution over (1..2^31)<br />
__fixsfdi 13 24 15.6 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 9 16 11.0 Random distribution over (-2^63..2^63)<br />
__floatsisf 17 23 17.7 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 13 19 13.7 Random distribution over (1..2^31)<br />
__floatdisf 21 37 24.8 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 19 26 21.0 Random distribution over (-2^63..2^63)<br />
__fixdfsi 6 25 15.1 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 2 17 11.5 Random distribution over (1..2^31)<br />
__fixdfdi 10 37 27.3 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 4 20 17.5 Random distribution over (-2^63..2^63)<br />
__floatsidf 11 14 12.4 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 4 4 4.0 Random distribution over (1..2^31)<br />
__floatdidf 13 29 19.7 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 8 18 12.8 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 9 9 9.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 19 19 19.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10603
emFloat
2021-09-03T15:39:19Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei N200 || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei N200 || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Speed|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes || 2.6.0 || Balanced || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_TLSR9518A_2p6p0_Balanced&diff=10602
Bench Arith TLSR9518A 2p6p0 Balanced
2021-09-03T15:36:38Z
<p>Paul: Created page with " <nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emRun v2.26.0 + emFloat v2.6.0 Target: TLSF9518A Target: RV32..."</p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emRun v2.26.0 + emFloat v2.6.0<br />
Target: TLSF9518A<br />
Target: RV32IMACP<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 2<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With RISC-V SIMD acceleration<br />
Config: With Andes V5 Performance Extension acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 33 50 38.8 Random distribution over (0, 1), operands differ<br />
__subsf3 25 59 39.6 Random distribution over (0, 1), operands differ<br />
__mulsf3 28 37 30.0 Random distribution over (0, 1), operands differ<br />
__divsf3 58 58 58.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__gesf2 12 12 12.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__nesf2 11 11 11.0 Random distribution over (0, 1), operands differ<br />
__adddf3 38 68 50.3 Random distribution over (0, 1), operands differ<br />
__subdf3 43 97 66.1 Random distribution over (0, 1), operands differ<br />
__muldf3 52 75 60.4 Random distribution over (0, 1), operands differ<br />
__divdf3 132 161 150.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 13 21 13.4 Random distribution over (0, 1), operands differ<br />
__ledf2 13 25 13.8 Random distribution over (0, 1), operands differ<br />
__gtdf2 14 20 14.7 Random distribution over (0, 1), operands differ<br />
__gedf2 14 22 14.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 15 15 15.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 10 13 12.8 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 8 11 9.9 Random distribution over (1..2^31)<br />
__fixsfdi 13 24 15.6 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 9 16 11.0 Random distribution over (-2^63..2^63)<br />
__floatsisf 17 23 17.7 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 13 19 13.7 Random distribution over (1..2^31)<br />
__floatdisf 21 37 24.8 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 19 26 21.0 Random distribution over (-2^63..2^63)<br />
__fixdfsi 6 25 15.1 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 2 17 11.5 Random distribution over (1..2^31)<br />
__fixdfdi 10 37 27.3 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 4 20 17.5 Random distribution over (-2^63..2^63)<br />
__floatsidf 11 14 12.4 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 4 4 4.0 Random distribution over (1..2^31)<br />
__floatdidf 13 29 19.7 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 8 18 12.8 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 9 9 9.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 19 19 19.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10601
emFloat
2021-09-03T15:35:33Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei N200 || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || Nuclei N200 || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
| TLSR9518A || RV32IMAC_P_V5 || Andes || 2.6.0 || Speed || Run from ILM, data in DLM || [[Bench_Arith_TLSR9518A_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10600
emFloat
2021-09-03T14:36:10Z
<p>Paul: </p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | Core<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| GD32VF103 || RV32IMAC || N200 || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || N200 || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_GD32VF103_2p6p0_Balanced&diff=10599
Bench Arith GD32VF103 2p6p0 Balanced
2021-09-03T14:34:50Z
<p>Paul: Created page with " <nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emFloat v2.6.0 Target: GD32VF103 Target: RV32IMAC Target: Lit..."</p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emFloat v2.6.0<br />
Target: GD32VF103<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 0<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 44 53 45.7 Random distribution over (0, 1), operands differ<br />
__subsf3 38 64 58.2 Random distribution over (0, 1), operands differ<br />
__mulsf3 35 41 36.5 Random distribution over (0, 1), operands differ<br />
__divsf3 65 65 65.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__lesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__gesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__nesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__adddf3 48 67 58.4 Random distribution over (0, 1), operands differ<br />
__subdf3 59 116 79.4 Random distribution over (0, 1), operands differ<br />
__muldf3 61 71 65.0 Random distribution over (0, 1), operands differ<br />
__divdf3 289 306 297.1 Random distribution over (0, 1), operands differ<br />
__ltdf2 14 15 14.4 Random distribution over (0, 1), operands differ<br />
__ledf2 14 15 14.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 14 15 14.6 Random distribution over (0, 1), operands differ<br />
__gedf2 14 15 14.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 13 16 13.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 13 13 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 11 11 11.0 Random distribution over (1..2^31)<br />
__fixsfdi 18 23 20.5 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 13 18 15.5 Random distribution over (-2^63..2^63)<br />
__floatsisf 38 40 38.3 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 35 36 35.1 Random distribution over (1..2^31)<br />
__floatdisf 46 50 47.9 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 39 47 40.6 Random distribution over (-2^63..2^63)<br />
__fixdfsi 8 16 15.7 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 6 13 12.8 Random distribution over (1..2^31)<br />
__fixdfdi 7 29 25.2 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 23 19.8 Random distribution over (-2^63..2^63)<br />
__floatsidf 33 33 33.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 29 29 29.0 Random distribution over (1..2^31)<br />
__floatdidf 36 55 45.2 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 32 49 40.1 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 25 25 25.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10598
emFloat
2021-09-03T14:33:46Z
<p>Paul: </p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| GD32VF103 || RV32IMAC || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
| GD32VF103 || RV32IMAC || 2.6.0 || Balanced || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Balanced|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_GD32VF103_2p6p0_Speed&diff=10597
Bench Arith GD32VF103 2p6p0 Speed
2021-09-03T14:30:00Z
<p>Paul: </p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emFloat 2.6.0<br />
Target: GD32VF103<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 2<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 44 51 45.7 Random distribution over (0, 1), operands differ<br />
__subsf3 38 64 58.2 Random distribution over (0, 1), operands differ<br />
__mulsf3 35 41 36.5 Random distribution over (0, 1), operands differ<br />
__divsf3 65 65 65.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__lesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 9 12 9.0 Random distribution over (0, 1), operands differ<br />
__gesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__nesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__adddf3 48 67 58.4 Random distribution over (0, 1), operands differ<br />
__subdf3 59 116 79.4 Random distribution over (0, 1), operands differ<br />
__muldf3 61 71 65.0 Random distribution over (0, 1), operands differ<br />
__divdf3 193 197 196.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 14 15 14.4 Random distribution over (0, 1), operands differ<br />
__ledf2 14 15 14.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 14 15 14.6 Random distribution over (0, 1), operands differ<br />
__gedf2 14 15 14.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 13 13 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 11 11 11.0 Random distribution over (1..2^31)<br />
__fixsfdi 18 23 20.5 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 13 18 15.5 Random distribution over (-2^63..2^63)<br />
__floatsisf 38 40 38.3 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 35 36 35.1 Random distribution over (1..2^31)<br />
__floatdisf 46 50 47.9 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 39 47 40.6 Random distribution over (-2^63..2^63)<br />
__fixdfsi 8 16 15.7 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 6 13 12.8 Random distribution over (1..2^31)<br />
__fixdfdi 7 29 25.2 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 23 19.8 Random distribution over (-2^63..2^63)<br />
__floatsidf 33 33 33.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 29 29 29.0 Random distribution over (1..2^31)<br />
__floatdidf 36 55 45.2 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 32 49 40.1 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 25 25 25.0 Random distribution over (-2^63..1, 1..2^63)</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=Bench_Arith_GD32VF103_2p6p0_Speed&diff=10596
Bench Arith GD32VF103 2p6p0 Speed
2021-09-03T14:28:20Z
<p>Paul: Created page with " <nowiki>IEEE-754 Floating-point Library Benchmarks Copyright (c) 2018-2021 SEGGER Microcontroller GmbH. System: emFloat 2.6.0 Target: GD32VF103 Target: RV32IMAC Target: Litt..."</p>
<hr />
<div> <nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2021 SEGGER Microcontroller GmbH.<br />
<br />
System: emFloat 2.6.0<br />
Target: GD32VF103<br />
Target: RV32IMAC<br />
Target: Little-endian byte order<br />
Config: SEGGER_RTL_OPTIMIZE = 2<br />
Config: SEGGER_RTL_FP_HW = 0 // No FPU, software floating point<br />
Config: SEGGER_RTL_FP_ABI = 0 // Floats and doubles in core registers<br />
Config: With assembly-coded acceleration<br />
Config: With fully conformant NaNs<br />
<br />
======================<br />
GNU libgcc API<br />
======================<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 44 51 45.7 Random distribution over (0, 1), operands differ<br />
__subsf3 38 64 58.2 Random distribution over (0, 1), operands differ<br />
__mulsf3 35 41 36.5 Random distribution over (0, 1), operands differ<br />
__divsf3 65 65 65.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__lesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 9 12 9.0 Random distribution over (0, 1), operands differ<br />
__gesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__nesf2 9 9 9.0 Random distribution over (0, 1), operands differ<br />
__adddf3 48 67 58.4 Random distribution over (0, 1), operands differ<br />
__subdf3 59 116 79.4 Random distribution over (0, 1), operands differ<br />
__muldf3 61 71 65.0 Random distribution over (0, 1), operands differ<br />
__divdf3 193 197 196.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 14 15 14.4 Random distribution over (0, 1), operands differ<br />
__ledf2 14 15 14.4 Random distribution over (0, 1), operands differ<br />
__gtdf2 14 15 14.6 Random distribution over (0, 1), operands differ<br />
__gedf2 14 15 14.6 Random distribution over (0, 1), operands differ<br />
__eqdf2 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 13 13 13.0 Random distribution over (-2^31.., 1..2^31)<br />
__fixunssfsi 11 11 11.0 Random distribution over (1..2^31)<br />
__fixsfdi 18 23 20.5 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunssfdi 13 18 15.5 Random distribution over (-2^63..2^63)<br />
__floatsisf 38 40 38.3 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsisf 35 36 35.1 Random distribution over (1..2^31)<br />
__floatdisf 46 50 47.9 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundisf 39 47 40.6 Random distribution over (-2^63..2^63)<br />
__fixdfsi 8 16 15.7 Random distribution over (-2^31.., 1..2^31)<br />
__fixunsdfsi 6 13 12.8 Random distribution over (1..2^31)<br />
__fixdfdi 7 29 25.2 Random distribution over (-2^63..1, 1..2^63)<br />
__fixunsdfdi 7 23 19.8 Random distribution over (-2^63..2^63)<br />
__floatsidf 33 33 33.0 Random distribution over (-2^31.., 1..2^31)<br />
__floatunsidf 29 29 29.0 Random distribution over (1..2^31)<br />
__floatdidf 36 55 45.2 Random distribution over (-2^63..1, 1..2^63)<br />
__floatundidf 32 49 40.1 Random distribution over (-2^63..2^63)<br />
__extendsfdf2 12 12 12.0 Random distribution over (-2^63..1, 1..2^63)<br />
__truncdfsf2 25 25 25.0 Random distribution over (-2^63..1, 1..2^63)<br />
</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10595
emFloat
2021-09-03T14:25:40Z
<p>Paul: /* Arithmetic performance */</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==<br />
<br />
{| class="wikitable sortable"<br />
|+ emFloat on real hardware<br />
|-<br />
! scope="col" | Device<br />
! scope="col" | Architecture<br />
! scope="col" | emFloat<br />
! scope="col" | Configuration<br />
! scope="col" class="unsortable" | Notes<br />
! scope="col" class="unsortable" | Link<br />
|-<br />
| GD32VF103 || RV32IMAC || 2.6.0 || Speed || Run from flash, data in internal RAM || [[Bench_Arith_GD32VF103_2p6p0_Speed|Results]]<br />
|-<br />
|}</div>
Paul
https://wiki.segger.com/index.php?title=emFloat&diff=10594
emFloat
2021-09-03T14:14:38Z
<p>Paul: Created page with "emFloat is the performance-optimized floating-point library for microcontrollers. This wiki page explains and links to other articles providing information too specific for t..."</p>
<hr />
<div>emFloat is the performance-optimized floating-point library for microcontrollers.<br />
<br />
This wiki page explains and links to other articles providing information too specific for the user manual or [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ product pages on www.segger.com]<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Arithmetic performance ==</div>
Paul
https://wiki.segger.com/index.php?title=Main_Page&diff=10593
Main Page
2021-09-03T14:11:44Z
<p>Paul: Add emFloat</p>
<hr />
<div><strong>Welcome to the SEGGER Wiki</strong><br />
<br />
This Wiki has been created to answer questions about Embedded Systems in general and to explain terms used in this context (our [[Knowledge Base]]), as well to have a place for information that is<br />
related to our products, but is too specific for the product descriptions on www.segger.com. An example of something too specific is: "How to enable Trace on a particular Evaluation Board".<br />
It is a work in progress and we continue to make it better and more valuable . For any kind of feedback, please contact us at info@segger.com.<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Knowledge Base ==<br />
The Knowledge Base explains terms often used in the field of Embedded Computing Systems, or "Embedded Systems", as we say in our industry. <br />
<br />
We aim to be a useful resource to engineers, students, and hobbyists programming Embedded Systems - typically microcontrollers, typically in C, C++, and some bits and pieces of Assembly language.<br />
<br />
We explain things from a programmer's perspective and, where we can, provide useful code examples.<br />
<br />
Examples of the terms we explain are:<br />
<br />
[[CPU]], [[CRC]], [[Embedded System]], [[Interrupt]], [[Microcontroller]], [[Watchdog]]<br />
<br />
[[Knowledge Base]] has its own wiki page. To go there, [[Knowledge Base | click here.]]<br />
<br />
== Debug and Trace Probes ==<br />
[[File:Category Icon Debug Tools.svg|link=https://www.segger.com/products/debug-trace-probes/|right|200px|Debug and Trace Tools]]<br />
Debug and trace probes enable verification and debugging of embedded systems while they are running. The probes connect the embbedded system with the computer used for development. This section is dedicated to SEGGER's product portfolio and the related technology.<br />
<br />
=== J-Link & J-Trace ===<br />
SEGGER J-Links are the most widely used line of debug probes available today. They've proven their value for more than 15 years.<br />
J-Trace PRO defines a new standard for trace probes. It enables streaming trace on Cortex-M, Cortex-A, and Cortex-R based targets with ETM<br />
<br />
* [[Debug Probes - J-Link & J-Trace | J-Link & J-Trace in this Wiki]]<br />
* [https://www.segger.com/jtrace J-Trace on www.segger.com]<br />
* [https://www.segger.com/jlink J-Link on www.segger.com]<br />
<br />
<br clear=all><br />
<br />
== Software Development Tools ==<br />
[[File:Category Icon Software Tools.svg|link=https://www.segger.com/products/software-development-tools/|right|200px|Software Tools]]<br />
Software tools are those tools running on a computer used for developing embedded systems. This includes tools to edit source code, to build firmware, to verify functionality and to find bugs if required. This section is dedicated to SEGGER's product portfolio and the related technology.<br />
<br />
=== Embedded Studio ===<br />
SEGGER Embedded Studio is a complete all-in-one solution for managing, building, testing and deploying your embedded applications.<br />
<br />
* [[Embedded Studio | Embedded Studio in this Wiki]]<br />
* [https://www.segger.com/products/development-tools/embedded-studio/ Embedded Studio on www.segger.com]<br />
<br />
=== SystemView ===<br />
SEGGER SystemView is a real-time recording and visualization tool for embedded systems that reveals the true runtime behavior of an application, going far deeper than the system insights provided by debuggers.<br />
<br />
* [[SystemView | SystemView in this Wiki]]<br />
* [https://www.segger.com/systemview SystemView on www.segger.com]<br />
<br />
=== Ozone ===<br />
Ozone is a full-featured graphical debugger and performance analyzer for embedded applications.<br />
<br />
* [[Ozone | Ozone in this Wiki]]<br />
* [https://www.segger.com/ozone Ozone on www.segger.com]<br />
<br />
<br clear=all><br />
<br />
== Embedded Software ==<br />
[[File:Category Icon Embedded Software.svg|link=https://www.segger.com/products/rtos-embedded-software/|right|200px|Embedded Software, Stacks and Libraries]]<br />
Embedded software includes all libraries, stacks, middleware and software packages used as building blocks for an embedded system's firmware.<br />
This section is dedicated to SEGGER's product portfolio and the related technology. SEGGER's Embedded Software has been deployed in billions of devices.<br />
<br />
=== embOS ===<br />
embOS is a Real Time Operating System (RTOS) by SEGGER.<br />
* [[embOS | embOS in this Wiki]]<br />
* [https://www.segger.com/embOS embOS on www.segger.com]<br />
<br />
=== emCompress ===<br />
emCompress is a collection of software libraries enabling data compression and decompression on, but not limited to, resource-constrained devices.<br />
* [[emCompress | emCompress in this Wiki]]<br />
* [https://www.segger.com/emCompress emCompress on www.segger.com]<br />
<br />
=== emCrypt ===<br />
emCrypt is a secure and efficient implementation of essential cryptographic algorithms specifically designed for embedded systems. <br />
* [[emCrypt | emCrypt in this Wiki]]<br />
* [https://www.segger.com/emCrypt emCrypt on www.segger.com]<br />
<br />
=== emFile ===<br />
emFile is the reliable file system for non-volatile and removable memories.<br />
* [[emFile | emFile in this Wiki]]<br />
* [https://www.segger.com/emFile emFile on www.segger.com]<br />
<br />
=== emFloat ===<br />
emFile is the performance-optimized floating-point library for microcontrollers.<br />
* [[emFloat | emFloat in this Wiki]]<br />
* [https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library/ emFloat on www.segger.com]<br />
<br />
=== emFTP ===<br />
The emFTP FTP (File Transfer Protocol) server is an optional extension which adds the FTP protocol to the stack. <br />
* [[emFTP | emFTP in this Wiki]]<br />
* [https://www.segger.com/emftp emFTP on www.segger.com]<br />
<br />
=== emLib ===<br />
emLib is a collection of software modules such as, cryptographic modules and data integrity checks for different purposes. <br />
* [[emLib | emLib in this Wiki]]<br />
* [https://www.segger.com/emlib emLib on www.segger.com]<br />
<br />
=== emLoad ===<br />
emLoad is a bootloader for firmware updates.<br />
* [[emLoad | emLoad in this Wiki]]<br />
* [https://www.segger.com/emload emLoad on www.segger.com]<br />
<br />
=== emModbus ===<br />
emModbus, SEGGER's implementation of the Modbus protocol, supports communication via UART (ASCII, RTU), Ethernet (Modbus/TCP and Modbus/UDP), and is capable of communicating with any Modbus compliant device. <br />
* [[emModbus | emModbus in this Wiki]]<br />
* [https://www.segger.com/emmodbus emModbus on www.segger.com]<br />
<br />
=== emMQTT ===<br />
emMQTT provides the client functionality of the Message Queue Telemetry Transport protocol to a stack. <br />
* [[emMQTT | emMQTT in this Wiki]]<br />
* [https://www.segger.com/emMQTT emMQTT on www.segger.com]<br />
<br />
=== emNet ===<br />
emNet is the industry-leading IP stack for embedded systems.<br />
* [[emNet | emNet in this Wiki]]<br />
* [https://www.segger.com/emnet emNet on www.segger.com]<br />
<br />
=== emSecure ===<br />
emSecure is a software solution for embedded systems to securely authenticate digital assets.<br />
* [[emSecure | emSecure in this Wiki]]<br />
* [https://www.segger.com/emsecure emSecure on www.segger.com]<br />
<br />
=== emSSH ===<br />
emSSH offers the ability to establish a secure connection to any server application in your product.<br />
* [[emSSH | emSSH in this Wiki]]<br />
* [https://www.segger.com/emssh emSSH on www.segger.com]<br />
<br />
=== emSSL ===<br />
emSSL is an implementation of SSL (Secure Sockets Layer), now called TLS (Transport Layer Security) for Embedded Systems by SEGGER.<br />
* [[emSSL | emSSL in this Wiki]]<br />
* [https://www.segger.com/emSSL emSSL on www.segger.com]<br />
<br />
=== emUSB-Device ===<br />
emUSB-Device is a high performance USB device software specifically designed for embedded systems. <br />
* [[emUSB-Device | emUSB-Device in this Wiki]]<br />
* [https://www.segger.com/emUSB-Device emUSB-Device on www.segger.com]<br />
<br />
=== emUSB-Host ===<br />
emUSB-Host is a USB host software specifically designed for embedded systems.<br />
* [[emUSB-Host | emUSB-Host in this Wiki]]<br />
* [https://www.segger.com/emUSB-Host emUSB-Host on www.segger.com]<br />
<br />
=== emWeb ===<br />
emWeb provides easy to use graphical interfaces for control or data acquisition.<br />
* [[emWeb | emWeb in this Wiki]]<br />
* [https://www.segger.com/products/connectivity/emweb/ emWeb product page on segger.com]<br />
<br />
=== emWin ===<br />
emWin is an embedded GUI solution that enables the creation of highly efficient, high quality, graphical user interfaces on any embedded system. <br />
* [[emWin | emWin in this Wiki]]<br />
* [https://www.segger.com/products/user-interface/emwin/ emWin product page on segger.com]<br />
<br />
=== IoT Toolkit ===<br />
The IoT Toolkit is a collection of libraries that enables communication with modern IoT based environments and devices.<br />
* [[IoT Toolkit | IoT Toolkit in this Wiki]]<br />
* [https://www.segger.com/products/security-iot/iot-toolkit/ IoT Toolkit product page on segger.com]<br />
<br />
===SEGGER Runtime Library===<br />
The SEGGER RunTime Library converts any [[GCC]]-based toolchain into a professional development choice. It is used in SEGGER's Embedded Studio IDE and has proven its value for years. <br />
* [[SEGGER RunTime Library | SEGGER RunTime Library in this Wiki]]<br />
* [https://www.segger.com/products/development-tools/runtime-library/ SEGGER Runtime Library product page on segger.com]<br />
* [[SEGGER Floating-Point Library | SEGGER Floating-Point Library in this Wiki]]<br />
<br />
<br clear=all><br />
<br />
== Production Tools ==<br />
[[File:Category Icon Production Tools.svg|link=https://www.segger.com/products/flash-in-circuit-programmers/|right|200px|Production Programming Tools]]<br />
* [[Flasher|Flasher in this Wiki]]<br />
<br />
=== Flasher ARM ===<br />
The Flasher ARM is the programmer of SEGGER for all ARM core MCUs.<br />
* [[Flasher ARM|Flasher ARM in the wiki]]<br />
* [https://www.segger.com/products/production/flasher/models/about-flasher-arm/ Flasher ARM on segger.com]<br />
<br />
=== Flasher ATE ===<br />
The Flasher ATE is the gang programmer of SEGGER.<br />
* [[Flasher ATE|Flasher ATE in the wiki]]<br />
* [https://www.segger.com/products/production/flasher/models/gang-programmer-flasher-ate/ Flasher ATE on segger.com]<br />
<br />
=== Flasher Portable PLUS ===<br />
The Flasher Portable PLUS is the hand held programmer of SEGGER for all types of MCUs and flash devices for maintenance purpose.<br />
* [[Flasher Portable PLUS|Flasher Portable PLUS in the wiki]]<br />
* [https://www.segger.com/products/production/flasher/models/flasher-portable-plus/ Flasher Portable PLUS on segger.com]<br />
<br />
=== Flasher PRO ===<br />
The Flasher PRO is the programmer of SEGGER for all types of MCUs and flash devices.<br />
* [[Flasher PRO|Flasher PRO in the wiki]]<br />
* [https://www.segger.com/products/production/flasher/models/flasher-pro/ Flasher PRO on segger.com]<br />
<br />
=== Flasher SECURE ===<br />
The Flasher SECURE is the programmer of SEGGER for all types of MCUs for secure purpose.<br />
* [[Flasher SECURE|Flasher SECURE in the wiki]]<br />
* [https://www.segger.com/products/production/flasher/models/flasher-secure/ Flasher SECURE on segger.com]<br />
<br />
<br clear=all></div>
Paul
https://wiki.segger.com/index.php?title=Correct_typing_of_Thumb_functions&diff=8164
Correct typing of Thumb functions
2020-06-17T12:45:09Z
<p>Paul: Created page with "The SEGGER Linker strictly enforces correct typing of Thumb and Arm symbols for functions. When writing assembly language files, it is important that each function is correctl..."</p>
<hr />
<div>The SEGGER Linker strictly enforces correct typing of Thumb and Arm symbols for functions.<br />
When writing assembly language files, it is important that each function is correctly<br />
typed to inform the linker of the instruction set the function is intended to run in.<br />
<br />
It happens that it is easy to forget to "type" the symbol. The following is an untyped<br />
symbol:<br />
<br />
.thumb<br />
.globl Increment<br />
Increment:<br />
add r0, r0, #1<br />
bx lr<br />
<br />
This function increments its argument and returns. It is written to execute in the Thumb instruction set.<br />
When linking this function into a Cortex-M4 application, the SEGGER Linker complains that the<br />
function is incorrectly typed:<br />
<br />
error: relocation R_ARM_THM_CALL to Arm-mode function not supported on this core, from .text.main+20 (main.o) to Increment (AsmFuncs.o)<br />
<br />
This is indeed a problem. The GNU assembler requires that the function be declared as a "Thumb function" even though<br />
the Thumb instruction set is selected in the assembler. For that, you must use the .thumb_func directive:<br />
<br />
.thumb<br />
.thumb_func<br />
.globl Increment<br />
Increment:<br />
add r0, r0, #1<br />
bx lr<br />
<br />
The .thumb_func directive tells the assembler that the following label is a Thumb-mode label. And once that<br />
information is provided to the linker, the error is eliminated.<br />
<br />
Note that correct placement of the .thumb_func directive is essential. The following example,<br />
the .thumb_func directive follows the label and does not set the type of that label:<br />
<br />
.thumb<br />
.globl Increment<br />
Increment:<br />
.thumb_func<br />
add r0, r0, #1<br />
bx lr</div>
Paul
https://wiki.segger.com/index.php?title=Embedded_Studio&diff=8163
Embedded Studio
2020-06-17T12:27:49Z
<p>Paul: /* SEGGER Linker */</p>
<hr />
<div>Embedded Studio, is a complete all-in-one solution for managing, building, testing and deploying your embedded applications: From the Project Generator which gets you easily started with common ARM microcontrollers, to the powerful Project Manager and source code Editor, the included C/C++ Compiler and the integrated Debugger with advanced debug information windows and direct J-Link integration, right through to version control features for automatic deployment of your applications.<br />
<br />
Embedded Studio's uses a style similar to Microsoft's Visual Studio. It brings the same intuitive usage that PC developers are familiar with to the world of embedded engineering.<br />
<br />
This wiki page explains and links to details and device specifics that can not be found on the [https://www.segger.com/products/development-tools/embedded-studio/ Embedded Studio Product page].<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Installation & Licensing ==<br />
[[Get a License for Nordic Semiconductor Devices]]<br />
<br />
[[Get a Embedded Studio license for Serious Integrated development kits]]<br />
<br />
[[Installation on newer Linux Versions]]<br />
<br />
[[Installation issues on macOS Catalina]]<br />
<br />
[[Start multiple Embedded Studio instances on macOS]]<br />
<br />
[[License installation on a headless system]]<br />
<br />
== Performance ==<br />
[[Resolving slow build / high CPU usage issues]]<br />
<br />
== Project Setup and Build ==<br />
[[Port Projects from IAR Embedded Workbench to Embedded Studio]]<br />
<br />
[[Use an external Toolchain with Embedded Studio]]<br />
<br />
[[Porting from GCC to SEGGER Linker]]<br />
<br />
[[Add new Memory Sections and Segments]]<br />
<br />
[[Create a RAM Function]]<br />
<br />
[[Multiple project in one solution in Embedded Studio]]<br />
<br />
[[How to create a library project and use it in executable project]]<br />
<br />
[[Using User Build Steps in Embedded Studio]]<br />
<br />
== Project Configuration ==<br />
Embedded Studio features a powerful project management that enables full flexibility to configure any part of the project for best results.<br />
As part of this, options can be changed on any node within a project while inheriting unchanged options from higher levels.<br />
<br />
=== Private & Public Build Configurations ===<br />
Usually a project within any IDE is setup with different build configurations for different purposes.<br />
This can be one configuration to create code with output and information used for debugging (called "Debug") and one configuration which is optimized for size or speed to be used in the final product (called "Release").<br />
There are some differences between these build configurations.<br />
The configuration "Debug" is set up to produce debug information for the debugger, disables optimization, sets some defines to do additional checks in the code or to output messages to a debug terminal, or includes code used only for debugging.<br />
The configuration "Release" is set up to do only what is required in the product. Optimizations are enabled, defines are set to not do debug output, and debug runtime checks might be disabled.<br />
On the other hand a lot of options are shared between all build configurations.<br />
That can be the target processor, include directories, application-specific or device-specific defines, floating-point implementation, and compiler and linker configuration.<br />
<br />
With Embedded Studio default and shared options can be set in one place. Specific options can then be set or overridden per build configuration.<br />
This is what Private Configurations and Public Configurations are used for.<br />
A Public Configuration is a Build Configuration. It can be selected and built, and generates the output.<br />
Private Configurations cannot be built. Instead Public Configurations can inherit the options set in one or more Private Configurations.<br />
That way all Build Configurations ("Debug" and "Release") can inherit the shared options from the same Private Configuration ("Common").<br />
Target processor, include directories, ..., need to be set only in "Common" and are used in both, "Debug" and "Release".<br />
<br />
Private Configurations can also set defaults, which may be overridden or extended by Public Configurations.<br />
<br />
Include Directories and Preprocessor Definitions are always extended. <br />
"Common" might set the Include Directories "Inc; Setup; Device" and the Preprocessor Definitions "USE_OS;APP_VERSION=210;ENABLE_IPv6=0". These are used in "Debug" and "Release" builds.<br />
"Debug" might additionally add Include Directories "Config_Debug" and Preprocessor Definitions "DEBUG;ENABLE_CHECKS=1".<br />
"Release" might instead add "Config" and "NDEBUG;ENABLE_CHECKS=0".<br />
<br />
Selection Options, such as Optimization Level, Architecture, and FPU Type, can be overridden.<br />
"Common" might set Architecture as "ARM v7EM", FPU Type as "FPv5-D16", and Optimization Level to "None".<br />
In "Debug" nothing has to be changed, as this already fits.<br />
In "Release" the Optimization Level might be overridden to "Optimize for Size".<br />
<br />
Now Include Directories, Preprocessor Definitions, and Optimization Level are different, while the common ones do not have to be maintained in each Build Configuration.<br />
<br />
=== Override Options ===<br />
In Embedded Studio options cannot only be set on Solution or Project level. They can be set on any level, solution, projects, folders, and files.<br />
As with Build Configurations, all options that are not explicitly modified on a level, are inherited from the upper level.<br />
This enables modifying some options, such as defines, include directories, or optimization level, on one level, while retaining all other options.<br />
<br />
For example, a project should be optimized for size, but one module should instead be optimized for highest speed.<br />
All options are set on project level. Only the optimization level of the module is changed.<br />
<br />
Private and Public Configurations also apply on all levels.<br />
This also makes it possible to change the option of any level depending on the selected Build Configuration.<br />
<br />
=== Project Options ===<br />
To open the Project Options Dialog, select the item to change the options for in Project Explorer and go to Project -> Options... (Alt+Return), or right-click on the Item -> Options...<br />
<br />
In the upper left of the Options Dialog the Public or Private Configuration to change the options in can be selected.<br />
By default the active Build Configuration is selected.<br />
<br />
The "Search Options" text input enables easy filter for the option to be modified.<br />
<br />
When "Show Modified Options Only" is checked, only options which do not have default values are shown.<br />
Options which are modified on the selected item and configuration are marked with "modified". <br />
"inherited" indicates that the option has been modified in another configuration or on a higher level.<br />
Which value is inherited from which level and configuration is shown in the Description when the item is selected.<br />
<br />
==== Code Options ====<br />
''Main Article:'' [[Embedded Studio Code Options]]<br />
<br />
The Code Options configure the build system, the toolchain (compiler, assembler, linker), the preprocessor, library configuration, and user build steps.<br />
<br />
==== Debug Options ====<br />
''Main Article:'' [[Embedded Studio Debug Options]]<br />
<br />
The Debug Options configure how the project should be debugged, which debug interface (J-Link, GDB Server, Simulator) should be used, and how the target should be configured on certain operations.<br />
<br />
==== ES PRO Options ====<br />
''Main Article:'' [[Embedded Studio PRO Options]]<br />
<br />
The ES PRO Options are available when the [[Embedded Studio PRO]] Package is installed.<br />
They configure which components of ES PRO to use in the project and how the libraries should be configured.<br />
<br />
== Debugging ==<br />
[[Configure ETB Trace in Embedded Studio]]<br />
<br />
[[Configure SWO in Embedded Studio]]<br />
<br />
[[Enable RTOS Awareness in Embedded Studio]]<br />
<br />
[[Connect to remote J-Link via J-Link Tunnel Server]]<br />
<br />
[[Embedded Studio with GDB Server|Debug with Embedded Studio and GDB Server such as OpenOCD]]<br />
<br />
[[Set User-dependent J-Link connection in Embedded Studio]]<br />
<br />
== SEGGER Linker ==<br />
[[Placing external library symbols at specific address]]<br />
<br />
[[Correct typing of Thumb functions]]<br />
<br />
== Version Control ==<br />
[[VCS Configuration]]<br />
<br />
[[Category:Software Tools]]<br />
[[Category:Embedded Studio]]</div>
Paul
https://wiki.segger.com/index.php?title=Embedded_Studio&diff=8162
Embedded Studio
2020-06-17T12:27:30Z
<p>Paul: /* SEGGER Linker */</p>
<hr />
<div>Embedded Studio, is a complete all-in-one solution for managing, building, testing and deploying your embedded applications: From the Project Generator which gets you easily started with common ARM microcontrollers, to the powerful Project Manager and source code Editor, the included C/C++ Compiler and the integrated Debugger with advanced debug information windows and direct J-Link integration, right through to version control features for automatic deployment of your applications.<br />
<br />
Embedded Studio's uses a style similar to Microsoft's Visual Studio. It brings the same intuitive usage that PC developers are familiar with to the world of embedded engineering.<br />
<br />
This wiki page explains and links to details and device specifics that can not be found on the [https://www.segger.com/products/development-tools/embedded-studio/ Embedded Studio Product page].<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== Installation & Licensing ==<br />
[[Get a License for Nordic Semiconductor Devices]]<br />
<br />
[[Get a Embedded Studio license for Serious Integrated development kits]]<br />
<br />
[[Installation on newer Linux Versions]]<br />
<br />
[[Installation issues on macOS Catalina]]<br />
<br />
[[Start multiple Embedded Studio instances on macOS]]<br />
<br />
[[License installation on a headless system]]<br />
<br />
== Performance ==<br />
[[Resolving slow build / high CPU usage issues]]<br />
<br />
== Project Setup and Build ==<br />
[[Port Projects from IAR Embedded Workbench to Embedded Studio]]<br />
<br />
[[Use an external Toolchain with Embedded Studio]]<br />
<br />
[[Porting from GCC to SEGGER Linker]]<br />
<br />
[[Add new Memory Sections and Segments]]<br />
<br />
[[Create a RAM Function]]<br />
<br />
[[Multiple project in one solution in Embedded Studio]]<br />
<br />
[[How to create a library project and use it in executable project]]<br />
<br />
[[Using User Build Steps in Embedded Studio]]<br />
<br />
== Project Configuration ==<br />
Embedded Studio features a powerful project management that enables full flexibility to configure any part of the project for best results.<br />
As part of this, options can be changed on any node within a project while inheriting unchanged options from higher levels.<br />
<br />
=== Private & Public Build Configurations ===<br />
Usually a project within any IDE is setup with different build configurations for different purposes.<br />
This can be one configuration to create code with output and information used for debugging (called "Debug") and one configuration which is optimized for size or speed to be used in the final product (called "Release").<br />
There are some differences between these build configurations.<br />
The configuration "Debug" is set up to produce debug information for the debugger, disables optimization, sets some defines to do additional checks in the code or to output messages to a debug terminal, or includes code used only for debugging.<br />
The configuration "Release" is set up to do only what is required in the product. Optimizations are enabled, defines are set to not do debug output, and debug runtime checks might be disabled.<br />
On the other hand a lot of options are shared between all build configurations.<br />
That can be the target processor, include directories, application-specific or device-specific defines, floating-point implementation, and compiler and linker configuration.<br />
<br />
With Embedded Studio default and shared options can be set in one place. Specific options can then be set or overridden per build configuration.<br />
This is what Private Configurations and Public Configurations are used for.<br />
A Public Configuration is a Build Configuration. It can be selected and built, and generates the output.<br />
Private Configurations cannot be built. Instead Public Configurations can inherit the options set in one or more Private Configurations.<br />
That way all Build Configurations ("Debug" and "Release") can inherit the shared options from the same Private Configuration ("Common").<br />
Target processor, include directories, ..., need to be set only in "Common" and are used in both, "Debug" and "Release".<br />
<br />
Private Configurations can also set defaults, which may be overridden or extended by Public Configurations.<br />
<br />
Include Directories and Preprocessor Definitions are always extended. <br />
"Common" might set the Include Directories "Inc; Setup; Device" and the Preprocessor Definitions "USE_OS;APP_VERSION=210;ENABLE_IPv6=0". These are used in "Debug" and "Release" builds.<br />
"Debug" might additionally add Include Directories "Config_Debug" and Preprocessor Definitions "DEBUG;ENABLE_CHECKS=1".<br />
"Release" might instead add "Config" and "NDEBUG;ENABLE_CHECKS=0".<br />
<br />
Selection Options, such as Optimization Level, Architecture, and FPU Type, can be overridden.<br />
"Common" might set Architecture as "ARM v7EM", FPU Type as "FPv5-D16", and Optimization Level to "None".<br />
In "Debug" nothing has to be changed, as this already fits.<br />
In "Release" the Optimization Level might be overridden to "Optimize for Size".<br />
<br />
Now Include Directories, Preprocessor Definitions, and Optimization Level are different, while the common ones do not have to be maintained in each Build Configuration.<br />
<br />
=== Override Options ===<br />
In Embedded Studio options cannot only be set on Solution or Project level. They can be set on any level, solution, projects, folders, and files.<br />
As with Build Configurations, all options that are not explicitly modified on a level, are inherited from the upper level.<br />
This enables modifying some options, such as defines, include directories, or optimization level, on one level, while retaining all other options.<br />
<br />
For example, a project should be optimized for size, but one module should instead be optimized for highest speed.<br />
All options are set on project level. Only the optimization level of the module is changed.<br />
<br />
Private and Public Configurations also apply on all levels.<br />
This also makes it possible to change the option of any level depending on the selected Build Configuration.<br />
<br />
=== Project Options ===<br />
To open the Project Options Dialog, select the item to change the options for in Project Explorer and go to Project -> Options... (Alt+Return), or right-click on the Item -> Options...<br />
<br />
In the upper left of the Options Dialog the Public or Private Configuration to change the options in can be selected.<br />
By default the active Build Configuration is selected.<br />
<br />
The "Search Options" text input enables easy filter for the option to be modified.<br />
<br />
When "Show Modified Options Only" is checked, only options which do not have default values are shown.<br />
Options which are modified on the selected item and configuration are marked with "modified". <br />
"inherited" indicates that the option has been modified in another configuration or on a higher level.<br />
Which value is inherited from which level and configuration is shown in the Description when the item is selected.<br />
<br />
==== Code Options ====<br />
''Main Article:'' [[Embedded Studio Code Options]]<br />
<br />
The Code Options configure the build system, the toolchain (compiler, assembler, linker), the preprocessor, library configuration, and user build steps.<br />
<br />
==== Debug Options ====<br />
''Main Article:'' [[Embedded Studio Debug Options]]<br />
<br />
The Debug Options configure how the project should be debugged, which debug interface (J-Link, GDB Server, Simulator) should be used, and how the target should be configured on certain operations.<br />
<br />
==== ES PRO Options ====<br />
''Main Article:'' [[Embedded Studio PRO Options]]<br />
<br />
The ES PRO Options are available when the [[Embedded Studio PRO]] Package is installed.<br />
They configure which components of ES PRO to use in the project and how the libraries should be configured.<br />
<br />
== Debugging ==<br />
[[Configure ETB Trace in Embedded Studio]]<br />
<br />
[[Configure SWO in Embedded Studio]]<br />
<br />
[[Enable RTOS Awareness in Embedded Studio]]<br />
<br />
[[Connect to remote J-Link via J-Link Tunnel Server]]<br />
<br />
[[Embedded Studio with GDB Server|Debug with Embedded Studio and GDB Server such as OpenOCD]]<br />
<br />
[[Set User-dependent J-Link connection in Embedded Studio]]<br />
<br />
== SEGGER Linker ==<br />
[[Placing external library symbols at specific address]]<br />
[[Correct typing of Thumb functions]]<br />
<br />
== Version Control ==<br />
[[VCS Configuration]]<br />
<br />
[[Category:Software Tools]]<br />
[[Category:Embedded Studio]]</div>
Paul
https://wiki.segger.com/index.php?title=SEGGER_Floating-Point_Library&diff=6821
SEGGER Floating-Point Library
2020-01-31T22:10:47Z
<p>Paul: </p>
<hr />
<div>The SEGGER Floating-Point Library is an essential part of the SEGGER Runtime Library. It is available stand-alone or as part of the SEGGER Runtime Library package, and already included in the use of SEGGER Embedded Studio.<br />
<br />
The floating-point library contains complete, fully optimized and verified floating point functionality, which is required for devices without an FPU. The floating-point emulator, a crucial part of the floating-point library, of the Arm and RISC-V variants are written in assembly language, optimized either for small code size or increased execution speed. For other processor architectures the library has a portable C implementation.<br />
<br />
For more information, refer to https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== ARM performance ==<br />
<br />
=== Basic arithmetic performance (Cortex-M) ===<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: Cortex-M<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__aeabi_fadd 34 34 34.0 Random distribution over (0, 1), operands differ<br />
__aeabi_fsub 33 43 38.6 Random distribution over (0, 1), operands differ<br />
__aeabi_frsub 33 43 38.6 Random distribution over (0, 1), operands differ<br />
__aeabi_fmul 26 26 26.0 Random distribution over (0, 1), operands differ<br />
__aeabi_fdiv 52 52 52.0 Random distribution over (0, 1), operands differ<br />
__aeabi_fcmplt 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__aeabi_fcmple 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__aeabi_fcmpgt 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__aeabi_fcmpge 13 13 13.0 Random distribution over (0, 1), operands differ<br />
__aeabi_fcmpeq 7 7 7.0 Random distribution over (0, 1), operands differ<br />
__aeabi_dadd 50 57 54.5 Random distribution over (0, 1), operands differ<br />
__aeabi_dsub 65 80 71.2 Random distribution over (0, 1), operands differ<br />
__aeabi_drsub 65 80 71.2 Random distribution over (0, 1), operands differ<br />
__aeabi_dmul 55 57 56.4 Random distribution over (0, 1), operands differ<br />
__aeabi_ddiv 135 135 135.0 Random distribution over (0, 1), operands differ<br />
__aeabi_dcmplt 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__aeabi_dcmple 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__aeabi_dcmpgt 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__aeabi_dcmpge 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__aeabi_dcmpeq 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__aeabi_f2iz 9 9 9.0 Random distribution with magnitudes (1..2^31), signed<br />
__aeabi_f2uiz 6 6 6.0 Random distribution with magnitudes (1..2^31)<br />
__aeabi_f2lz 11 18 13.5 Random distribution with magnitudes (1..2^63), signed<br />
__aeabi_f2ulz 10 14 12.0 Random distribution with magnitudes (1..2^63)<br />
__aeabi_i2f 10 14 10.5 Random distribution with magnitudes (1..2^31), signed<br />
__aeabi_ui2f 7 12 7.5 Random distribution with magnitudes (1..2^31)<br />
__aeabi_l2f 16 23 19.0 Random distribution with magnitudes (1..2^63), signed<br />
__aeabi_ul2f 11 18 13.8 Random distribution with magnitudes (1..2^63)<br />
__aeabi_d2iz 8 12 11.9 Random distribution with magnitudes (1..2^31), signed<br />
__aeabi_d2uiz 10 10 10.0 Random distribution with magnitudes (1..2^31)<br />
__aeabi_d2lz 14 21 17.5 Random distribution with magnitudes (1..2^63), signed<br />
__aeabi_d2ulz 13 16 14.5 Random distribution with magnitudes (1..2^63)<br />
__aeabi_i2d 12 12 12.0 Random distribution with magnitudes (1..2^31), signed<br />
__aeabi_ui2d 8 8 8.0 Random distribution with magnitudes (1..2^31)<br />
__aeabi_l2d 15 21 17.9 Random distribution with magnitudes (1..2^63), signed<br />
__aeabi_ul2d 11 15 12.9 Random distribution with magnitudes (1..2^63)<br />
__aeabi_f2d 9 9 9.0 Random distribution with magnitudes (1..2^63), signed<br />
__aeabi_d2f 11 11 11.0 Random distribution with magnitudes (1..2^63), signed</nowiki><br />
<br />
=== Mathematical function performance (Cortex-M) ===<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on an Arm Cortex-M4 microcontroller (NXP K66FN2M0):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: Cortex-M<br />
<br />
sinf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 21 sin(1e-4)<br />
3A83126F +1.00e-03 3A83126E +1.00e-03 3A83126E +1.00e-03 24.00 0.00 55 sin(1e-3)<br />
3C23D70A +1.00e-02 3C23D657 +1.00e-02 3C23D657 +1.00e-02 24.00 0.00 55 sin(1e-2)<br />
3DCCCCCD +1.00e-01 3DCC7577 +9.98e-02 3DCC7577 +9.98e-02 24.00 0.00 54 sin(1e-1)<br />
3F800000 +1.00e+00 3F576AA4 +8.41e-01 3F576AA4 +8.41e-01 24.00 0.00 139 sin(1)<br />
3FBC7F84 +1.47e+00 3F7EC48E +9.95e-01 3F7EC48E +9.95e-01 24.00 0.00 138 sin(1.47264147)<br />
3FC90FAD +1.57e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 138 sin(1.57079089)<br />
40490FAC +3.14e+00 373A8886 +1.11e-05 373A8886 +1.11e-05 24.00 0.00 106 sinf(3.14158154)<br />
421C4B56 +3.91e+01 3F7B14E5 +9.81e-01 3F7B14E5 +9.81e-01 24.00 0.00 148 sin(39.0735703)<br />
43B18000 +3.55e+02 B7FCDE82 -3.01e-05 B7FCDE82 -3.01e-05 24.00 0.00 152 sin(355)<br />
49800036 +1.05e+06 3F384A92 +7.20e-01 3F384A92 +7.20e-01 24.00 0.00 176 sin(1048582.75)<br />
489965E8 +3.14e+05 BC7BA1B2 -1.54e-02 BC7BA1B2 -1.54e-02 24.00 0.00 151 sin(100000*Pi)<br />
501502F9 +1.00e+10 BEF99A64 -4.88e-01 BEF99A64 -4.88e-01 24.00 0.00 187 sin(1e10)<br />
7E967699 +1.00e+38 3F7D39E2 +9.89e-01 3F7D39E2 +9.89e-01 24.00 0.00 186 sin(1e38)<br />
------ ------ ------ -----------------<br />
336.00 0.00 1706 Total<br />
<br />
cosf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 3 cos(1e-4)<br />
3A83126F +1.00e-03 3F7FFFF8 +1.00e+00 3F7FFFF8 +1.00e+00 24.00 0.00 48 cos(1e-3)<br />
3C23D70A +1.00e-02 3F7FFCB9 +1.00e+00 3F7FFCB9 +1.00e+00 24.00 0.00 48 cos(1e-2)<br />
3DCCCCCD +1.00e-01 3F7EB898 +9.95e-01 3F7EB898 +9.95e-01 24.00 0.00 48 cos(1e-1)<br />
3F800000 +1.00e+00 3F0A5140 +5.40e-01 3F0A5140 +5.40e-01 24.00 0.00 136 cos(1)<br />
3FBC7F84 +1.47e+00 3DC8B2D2 +9.80e-02 3DC8B2D2 +9.80e-02 24.00 0.00 103 cos(1.47264147)<br />
3FC90FE7 +1.57e+00 B5C5DDE9 -1.47e-06 B5C5DDE9 -1.47e-06 24.00 0.00 103 cos(1.57079780)<br />
40C90FE6 +6.28e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 136 cos(6.28319073)<br />
43B18000 +3.55e+02 BF800000 -1.00e+00 BF800000 -1.00e+00 24.00 0.00 180 cos(355)<br />
489965E8 +3.14e+05 3F7FF845 +1.00e+00 3F7FF845 +1.00e+00 24.00 0.00 180 cos(100000*Pi)<br />
501502F9 +1.00e+10 3F5F84C5 +8.73e-01 3F5F84C5 +8.73e-01 24.00 0.00 183 cos(1e10)<br />
7E967699 +1.00e+38 3E1655CD +1.47e-01 3E1655CD +1.47e-01 24.00 0.00 182 cos(1e38)<br />
------ ------ ------ -----------------<br />
288.00 0.00 1350 Total<br />
<br />
tanf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 25 tan(1e-4)<br />
3A83126F +1.00e-03 3A831272 +1.00e-03 3A831272 +1.00e-03 24.00 0.00 74 tan(1e-3)<br />
3C23D70A +1.00e-02 3C23D870 +1.00e-02 3C23D870 +1.00e-02 24.00 0.00 74 tan(1e-2)<br />
3DCCCCCD +1.00e-01 3DCD7C44 +1.00e-01 3DCD7C44 +1.00e-01 24.00 0.00 73 tan(1e-1)<br />
3F800000 +1.00e+00 3FC75923 +1.56e+00 3FC75923 +1.56e+00 24.00 0.00 258 tan(1)<br />
40CEAB45 +6.46e+00 3E35493C +1.77e-01 3E35493C +1.77e-01 24.00 0.00 258 tan(6.45840693)<br />
43B18000 +3.55e+02 37FCDE82 +3.01e-05 37FCDE82 +3.01e-05 24.00 0.00 282 tan(355)<br />
489965E8 +3.14e+05 BC7BA94B -1.54e-02 BC7BA94B -1.54e-02 24.00 0.00 273 tan(100000*Pi)<br />
501502F9 +1.00e+10 BF0EF000 -5.58e-01 BF0EF000 -5.58e-01 24.00 0.00 304 tan(1e10)<br />
7E967699 +1.00e+38 40D79AC2 +6.74e+00 40D79AC2 +6.74e+00 24.00 0.00 321 tan(1e38)<br />
------ ------ ------ -----------------<br />
240.00 0.00 1942 Total<br />
<br />
expf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
00000000 +0.00e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 3 expf(0)<br />
3727C5AC +1.00e-05 3F800054 +1.00e+00 3F800054 +1.00e+00 24.00 0.00 44 expf(1e-5)<br />
38D1B717 +1.00e-04 3F800347 +1.00e+00 3F800347 +1.00e+00 24.00 0.00 44 expf(1e-4)<br />
3951B717 +2.00e-04 3F80068E +1.00e+00 3F80068E +1.00e+00 24.00 0.00 44 expf(2e-4)<br />
39D1B717 +4.00e-04 3F800D1C +1.00e+00 3F800D1C +1.00e+00 24.00 0.00 43 expf(4e-4)<br />
39EBEDFA +4.50e-04 3F800EC0 +1.00e+00 3F800EC0 +1.00e+00 24.00 0.00 44 expf(4.5e-4)<br />
3A83126F +1.00e-03 3F8020C9 +1.00e+00 3F8020C9 +1.00e+00 24.00 0.00 44 expf(1e-3)<br />
3E80A138 +2.51e-01 3FA48EBB +1.29e+00 3FA48EBB +1.29e+00 24.00 0.00 81 expf(0.25123)<br />
3F0D1D69 +5.51e-01 3FDE2123 +1.74e+00 3FDE2123 +1.74e+00 24.00 0.00 80 expf(0.55123)<br />
4101999A +8.10e+00 454DE782 +3.29e+03 454DE782 +3.29e+03 24.00 0.00 81 expf(8.1)<br />
4180CCCD +1.61e+01 4B15DA03 +9.82e+06 4B15DA03 +9.82e+06 24.00 0.00 81 expf(16.1)<br />
------ ------ ------ -----------------<br />
264.00 0.00 589 Total<br />
<br />
logf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 C13834F1 -1.15e+01 C13834F1 -1.15e+01 24.00 0.00 158 logf(1e-5)<br />
44800000 +1.02e+03 40DDCE9E +6.93e+00 40DDCE9E +6.93e+00 24.00 0.00 100 logf(1024)<br />
45828A00 +4.18e+03 41056606 +8.34e+00 41056606 +8.34e+00 24.00 0.00 140 logf(4177.25)<br />
------ ------ ------ -----------------<br />
72.00 0.00 398 Total<br />
<br />
sinhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3727C5AC +1.00e-05 3727C5AC +1.00e-05 24.00 0.00 22 sinhf(1e-5)<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 23 sinhf(1e-4)<br />
3951B717 +2.00e-04 3951B717 +2.00e-04 3951B717 +2.00e-04 24.00 0.00 23 sinhf(2e-4)<br />
39D1B717 +4.00e-04 39D1B717 +4.00e-04 39D1B717 +4.00e-04 24.00 0.00 60 sinhf(4e-4)<br />
39EBEDFA +4.50e-04 39EBEDFB +4.50e-04 39EBEDFB +4.50e-04 24.00 0.00 59 sinhf(4.5e-4)<br />
3A83126F +1.00e-03 3A831270 +1.00e-03 3A831270 +1.00e-03 24.00 0.00 60 sinhf(1e-3)<br />
3E80A138 +2.51e-01 3E81FCB6 +2.54e-01 3E81FCB6 +2.54e-01 24.00 0.00 60 sinhf(0.25123)<br />
3F0D1D69 +5.51e-01 3F145EE3 +5.80e-01 3F145EE3 +5.80e-01 24.00 0.00 119 sinhf(0.55123)<br />
4101999A +8.10e+00 44CDE781 +1.65e+03 44CDE781 +1.65e+03 24.00 0.00 121 sinhf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 108 sinhf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 655 Total<br />
<br />
coshf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 28 coshf(1e-5)<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 28 coshf(1e-4)<br />
3951B717 +2.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 29 coshf(2e-4)<br />
39D1B717 +4.00e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 48 coshf(4e-4)<br />
39EBEDFA +4.50e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 48 coshf(4.5e-4)<br />
3A83126F +1.00e-03 3F800004 +1.00e+00 3F800004 +1.00e+00 24.00 0.00 47 coshf(1e-3)<br />
3E80A138 +2.51e-01 3F840F8D +1.03e+00 3F840F8D +1.03e+00 24.00 0.00 48 coshf(0.25123)<br />
3F0D1D69 +5.51e-01 3F93F1B2 +1.16e+00 3F93F1B2 +1.16e+00 24.00 0.00 111 coshf(0.55123)<br />
4101999A +8.10e+00 44CDE784 +1.65e+03 44CDE784 +1.65e+03 24.00 0.00 114 coshf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 100 coshf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 601 Total<br />
<br />
tanhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3E800000 +2.50e-01 3E7ACBF5 +2.45e-01 3E7ACBF5 +2.45e-01 24.00 0.00 66 tanhf(0.25)<br />
3F800000 +1.00e+00 3F42F7D6 +7.62e-01 3F42F7D6 +7.62e-01 24.00 0.00 108 tanhf(1)<br />
41200000 +1.00e+01 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 18 tanhf(10)<br />
------ ------ ------ -----------------<br />
72.00 0.00 192 Total<br />
======= ====== ====== =================<br />
1752.00 0.00 7433 Grand Total<br />
======= ====== ====== =================</nowiki><br />
<br />
== RISC-V performance ==<br />
<br />
=== Basic arithmetic performance (RV32IMAC) ===<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on a RISC-V RV32IMAC microcontroller (GigaDevice GD32VF103):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: RV32IMAC<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 45 60 49.5 Random distribution over (0, 1), operands differ<br />
__subsf3 42 84 62.2 Random distribution over (0, 1), operands differ<br />
__mulsf3 37 57 39.3 Random distribution over (0, 1), operands differ<br />
__divsf3 67 70 67.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 15 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 10 14 10.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 10 17 10.0 Random distribution over (0, 1), operands differ<br />
__gesf2 11 14 11.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 10 13 10.0 Random distribution over (0, 1), operands differ<br />
__nesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__adddf3 52 89 62.8 Random distribution over (0, 1), operands differ<br />
__subdf3 60 123 82.8 Random distribution over (0, 1), operands differ<br />
__muldf3 68 88 75.0 Random distribution over (0, 1), operands differ<br />
__divdf3 192 204 197.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 15 20 16.0 Random distribution over (0, 1), operands differ<br />
__ledf2 15 19 16.0 Random distribution over (0, 1), operands differ<br />
__gtdf2 15 20 16.1 Random distribution over (0, 1), operands differ<br />
__gedf2 15 19 16.1 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 17 14.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution with magnitudes (1..2^31), signed<br />
__fixunssfsi 13 13 13.0 Random distribution with magnitudes (1..2^31)<br />
__fixsfdi 20 29 23.2 Random distribution with magnitudes (1..2^63), signed<br />
__fixunssfdi 15 23 18.9 Random distribution with magnitudes (1..2^63)<br />
__floatsisf 28 47 32.6 Random distribution with magnitudes (1..2^31), signed<br />
__floatunsisf 28 42 33.0 Random distribution with magnitudes (1..2^31)<br />
__floatdisf 39 66 49.1 Random distribution with magnitudes (1..2^63), signed<br />
__floatundisf 35 58 44.1 Random distribution with magnitudes (1..2^63)<br />
__fixdfsi 9 20 16.8 Random distribution with magnitudes (1..2^31), signed<br />
__fixunsdfsi 9 14 13.8 Random distribution with magnitudes (1..2^31)<br />
__fixdfdi 9 34 26.9 Random distribution with magnitudes (1..2^63), signed<br />
__fixunsdfdi 9 25 21.5 Random distribution with magnitudes (1..2^63)<br />
__floatsidf 28 47 31.6 Random distribution with magnitudes (1..2^31), signed<br />
__floatunsidf 19 32 23.9 Random distribution with magnitudes (1..2^31)<br />
__floatdidf 30 73 45.1 Random distribution with magnitudes (1..2^63), signed<br />
__floatundidf 27 62 39.3 Random distribution with magnitudes (1..2^63)<br />
__extendsfdf2 14 18 14.1 Random distribution with magnitudes (1..2^63), signed<br />
__truncdfsf2 25 36 25.1 Random distribution with magnitudes (1..2^63), signed</nowiki><br />
<br />
=== Mathematical function performance (RV32IMAC) ===<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on a RISC-V RV32IMAC microcontroller (GigaDevice GD32VF103):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: RV32IMAC<br />
<br />
sinf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 8 sin(1e-4)<br />
3A83126F +1.00e-03 3A83126E +1.00e-03 3A83126E +1.00e-03 24.00 0.00 70 sin(1e-3)<br />
3C23D70A +1.00e-02 3C23D657 +1.00e-02 3C23D657 +1.00e-02 24.00 0.00 67 sin(1e-2)<br />
3DCCCCCD +1.00e-01 3DCC7577 +9.98e-02 3DCC7577 +9.98e-02 24.00 0.00 67 sin(1e-1)<br />
3F800000 +1.00e+00 3F576AA4 +8.41e-01 3F576AA4 +8.41e-01 24.00 0.00 182 sin(1)<br />
3FBC7F84 +1.47e+00 3F7EC48E +9.95e-01 3F7EC48E +9.95e-01 24.00 0.00 193 sin(1.47264147)<br />
3FC90FAD +1.57e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 196 sin(1.57079089)<br />
40490FAC +3.14e+00 373A8886 +1.11e-05 373A8886 +1.11e-05 24.00 0.00 153 sin(3.14158154)<br />
421C4B56 +3.91e+01 3F7B14E5 +9.81e-01 3F7B14E5 +9.81e-01 24.00 0.00 193 sin(39.0735703)<br />
43B18000 +3.55e+02 B7FCDE82 -3.01e-05 B7FCDE82 -3.01e-05 24.00 0.00 219 sin(355)<br />
49800036 +1.05e+06 3F384A92 +7.20e-01 3F384A92 +7.20e-01 24.00 0.00 236 sin(1048582.75)<br />
489965E8 +3.14e+05 BC7BA1B2 -1.54e-02 BC7BA1B2 -1.54e-02 24.00 0.00 214 sin(100000*Pi)<br />
501502F9 +1.00e+10 BEF99A64 -4.88e-01 BEF99A64 -4.88e-01 24.00 0.00 255 sin(1e10)<br />
7E967699 +1.00e+38 3F7D39E2 +9.89e-01 3F7D39E2 +9.89e-01 24.00 0.00 248 sin(1e38)<br />
------ ------ ------ -----------------<br />
336.00 0.00 2301 Total<br />
<br />
cosf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 10 cos(1e-4)<br />
3A83126F +1.00e-03 3F7FFFF8 +1.00e+00 3F7FFFF8 +1.00e+00 24.00 0.00 50 cos(1e-3)<br />
3C23D70A +1.00e-02 3F7FFCB9 +1.00e+00 3F7FFCB9 +1.00e+00 24.00 0.00 43 cos(1e-2)<br />
3DCCCCCD +1.00e-01 3F7EB898 +9.95e-01 3F7EB898 +9.95e-01 24.00 0.00 43 cos(1e-1)<br />
3F800000 +1.00e+00 3F0A5140 +5.40e-01 3F0A5140 +5.40e-01 24.00 0.00 186 cos(1)<br />
3FBC7F84 +1.47e+00 3DC8B2D2 +9.80e-02 3DC8B2D2 +9.80e-02 24.00 0.00 158 cos(1.47264147)<br />
3FC90FE7 +1.57e+00 B5C5DDE9 -1.47e-06 B5C5DDE9 -1.47e-06 24.00 0.00 161 cos(1.57079780)<br />
40C90FE6 +6.28e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 190 cos(6.28319073)<br />
43B18000 +3.55e+02 BF800000 -1.00e+00 BF800000 -1.00e+00 24.00 0.00 252 cos(355)<br />
489965E8 +3.14e+05 3F7FF845 +1.00e+00 3F7FF845 +1.00e+00 24.00 0.00 251 cos(100000*Pi)<br />
501502F9 +1.00e+10 3F5F84C5 +8.73e-01 3F5F84C5 +8.73e-01 24.00 0.00 245 cos(1e10)<br />
7E967699 +1.00e+38 3E1655CD +1.47e-01 3E1655CD +1.47e-01 24.00 0.00 257 cos(1e38)<br />
------ ------ ------ -----------------<br />
288.00 0.00 1846 Total<br />
<br />
tanf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 7 tan(1e-4)<br />
3A83126F +1.00e-03 3A831272 +1.00e-03 3A831272 +1.00e-03 24.00 0.00 92 tan(1e-3)<br />
3C23D70A +1.00e-02 3C23D870 +1.00e-02 3C23D870 +1.00e-02 24.00 0.00 87 tan(1e-2)<br />
3DCCCCCD +1.00e-01 3DCD7C44 +1.00e-01 3DCD7C44 +1.00e-01 24.00 0.00 86 tan(1e-1)<br />
3F800000 +1.00e+00 3FC75923 +1.56e+00 3FC75923 +1.56e+00 24.00 0.00 403 tan(1)<br />
40CEAB45 +6.46e+00 3E35493C +1.77e-01 3E35493C +1.77e-01 24.00 0.00 397 tan(6.45840693)<br />
43B18000 +3.55e+02 37FCDE82 +3.01e-05 37FCDE82 +3.01e-05 24.00 0.00 444 tan(355)<br />
489965E8 +3.14e+05 BC7BA94B -1.54e-02 BC7BA94B -1.54e-02 24.00 0.00 430 tan(100000*Pi)<br />
501502F9 +1.00e+10 BF0EF000 -5.58e-01 BF0EF000 -5.58e-01 24.00 0.00 458 tan(1e10)<br />
7E967699 +1.00e+38 40D79AC2 +6.74e+00 40D79AC2 +6.74e+00 24.00 0.00 483 tan(1e38)<br />
------ ------ ------ -----------------<br />
240.00 0.00 2887 Total<br />
<br />
expf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
00000000 +0.00e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 10 expf(0)<br />
3727C5AC +1.00e-05 3F800054 +1.00e+00 3F800054 +1.00e+00 24.00 0.00 45 expf(1e-5)<br />
38D1B717 +1.00e-04 3F800347 +1.00e+00 3F800347 +1.00e+00 24.00 0.00 41 expf(1e-4)<br />
3951B717 +2.00e-04 3F80068E +1.00e+00 3F80068E +1.00e+00 24.00 0.00 38 expf(2e-4)<br />
39D1B717 +4.00e-04 3F800D1C +1.00e+00 3F800D1C +1.00e+00 24.00 0.00 38 expf(4e-4)<br />
39EBEDFA +4.50e-04 3F800EC0 +1.00e+00 3F800EC0 +1.00e+00 24.00 0.00 38 expf(4.5e-4)<br />
3A83126F +1.00e-03 3F8020C9 +1.00e+00 3F8020C9 +1.00e+00 24.00 0.00 38 expf(1e-3)<br />
3E80A138 +2.51e-01 3FA48EBB +1.29e+00 3FA48EBB +1.29e+00 24.00 0.00 86 expf(0.25123)<br />
3F0D1D69 +5.51e-01 3FDE2123 +1.74e+00 3FDE2123 +1.74e+00 24.00 0.00 89 expf(0.55123)<br />
4101999A +8.10e+00 454DE782 +3.29e+03 454DE782 +3.29e+03 24.00 0.00 88 expf(8.1)<br />
4180CCCD +1.61e+01 4B15DA03 +9.82e+06 4B15DA03 +9.82e+06 24.00 0.00 86 expf(16.1)<br />
------ ------ ------ -----------------<br />
264.00 0.00 597 Total<br />
<br />
logf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 C13834F1 -1.15e+01 C13834F1 -1.15e+01 24.00 0.00 265 logf(1e-5)<br />
44800000 +1.02e+03 40DDCE9E +6.93e+00 40DDCE9E +6.93e+00 24.00 0.00 183 logf(1024)<br />
45828A00 +4.18e+03 41056606 +8.34e+00 41056606 +8.34e+00 24.00 0.00 240 logf(4177.25)<br />
------ ------ ------ -----------------<br />
72.00 0.00 688 Total<br />
<br />
sinhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3727C5AC +1.00e-05 3727C5AC +1.00e-05 24.00 0.00 14 sinhf(1e-5)<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 14 sinhf(1e-4)<br />
3951B717 +2.00e-04 3951B717 +2.00e-04 3951B717 +2.00e-04 24.00 0.00 13 sinhf(2e-4)<br />
39D1B717 +4.00e-04 39D1B717 +4.00e-04 39D1B717 +4.00e-04 24.00 0.00 67 sinhf(4e-4)<br />
39EBEDFA +4.50e-04 39EBEDFB +4.50e-04 39EBEDFB +4.50e-04 24.00 0.00 59 sinhf(4.5e-4)<br />
3A83126F +1.00e-03 3A831270 +1.00e-03 3A831270 +1.00e-03 24.00 0.00 59 sinhf(1e-3)<br />
3E80A138 +2.51e-01 3E81FCB6 +2.54e-01 3E81FCB6 +2.54e-01 24.00 0.00 59 sinhf(0.25123)<br />
3F0D1D69 +5.51e-01 3F145EE3 +5.80e-01 3F145EE3 +5.80e-01 24.00 0.00 137 sinhf(0.55123)<br />
4101999A +8.10e+00 44CDE781 +1.65e+03 44CDE781 +1.65e+03 24.00 0.00 133 sinhf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 112 sinhf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 667 Total<br />
<br />
coshf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 26 coshf(1e-5)<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 24 coshf(1e-4)<br />
3951B717 +2.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 24 coshf(2e-4)<br />
39D1B717 +4.00e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 50 coshf(4e-4)<br />
39EBEDFA +4.50e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 50 coshf(4.5e-4)<br />
3A83126F +1.00e-03 3F800004 +1.00e+00 3F800004 +1.00e+00 24.00 0.00 50 coshf(1e-3)<br />
3E80A138 +2.51e-01 3F840F8D +1.03e+00 3F840F8D +1.03e+00 24.00 0.00 50 coshf(0.25123)<br />
3F0D1D69 +5.51e-01 3F93F1B2 +1.16e+00 3F93F1B2 +1.16e+00 24.00 0.00 140 coshf(0.55123)<br />
4101999A +8.10e+00 44CDE784 +1.65e+03 44CDE784 +1.65e+03 24.00 0.00 139 coshf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 126 coshf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 679 Total<br />
<br />
tanhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3E800000 +2.50e-01 3E7ACBF5 +2.45e-01 3E7ACBF5 +2.45e-01 24.00 0.00 89 tanhf(0.25)<br />
3F800000 +1.00e+00 3F42F7D6 +7.62e-01 3F42F7D6 +7.62e-01 24.00 0.00 145 tanhf(1)<br />
41200000 +1.00e+01 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 14 tanhf(10)<br />
------ ------ ------ -----------------<br />
72.00 0.00 248 Total<br />
======= ====== ====== =================<br />
1752.00 0.00 9913 Grand Total<br />
======= ====== ====== =================</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=SEGGER_Floating-Point_Library&diff=6820
SEGGER Floating-Point Library
2020-01-31T17:30:20Z
<p>Paul: </p>
<hr />
<div>The SEGGER Floating-Point Library is an essential part of the SEGGER Runtime Library. It is available stand-alone or as part of the SEGGER Runtime Library package, and already included in the use of SEGGER Embedded Studio.<br />
<br />
The floating-point library contains complete, fully optimized and verified floating point functionality, which is required for devices without an FPU. The floating-point emulator, a crucial part of the floating-point library, of the Arm and RISC-V variants are written in assembly language, optimized either for small code size or increased execution speed. For other processor architectures the library has a portable C implementation.<br />
<br />
For more information, refer to https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library<br />
<br />
<div class="toclimit-3"><br />
__TOC__<br />
</div><br />
<br />
== ARM Performance ==<br />
<br />
=== Mathematical function performance (Cortex-M) ===<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on an Arm Cortex-M4 microcontroller (NXP K66FN2M0):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: Cortex-M<br />
<br />
sinf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 21 sin(1e-4)<br />
3A83126F +1.00e-03 3A83126E +1.00e-03 3A83126E +1.00e-03 24.00 0.00 55 sin(1e-3)<br />
3C23D70A +1.00e-02 3C23D657 +1.00e-02 3C23D657 +1.00e-02 24.00 0.00 55 sin(1e-2)<br />
3DCCCCCD +1.00e-01 3DCC7577 +9.98e-02 3DCC7577 +9.98e-02 24.00 0.00 54 sin(1e-1)<br />
3F800000 +1.00e+00 3F576AA4 +8.41e-01 3F576AA4 +8.41e-01 24.00 0.00 139 sin(1)<br />
3FBC7F84 +1.47e+00 3F7EC48E +9.95e-01 3F7EC48E +9.95e-01 24.00 0.00 138 sin(1.47264147)<br />
3FC90FAD +1.57e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 138 sin(1.57079089)<br />
40490FAC +3.14e+00 373A8886 +1.11e-05 373A8886 +1.11e-05 24.00 0.00 106 sinf(3.14158154)<br />
421C4B56 +3.91e+01 3F7B14E5 +9.81e-01 3F7B14E5 +9.81e-01 24.00 0.00 148 sin(39.0735703)<br />
43B18000 +3.55e+02 B7FCDE82 -3.01e-05 B7FCDE82 -3.01e-05 24.00 0.00 152 sin(355)<br />
49800036 +1.05e+06 3F384A92 +7.20e-01 3F384A92 +7.20e-01 24.00 0.00 176 sin(1048582.75)<br />
489965E8 +3.14e+05 BC7BA1B2 -1.54e-02 BC7BA1B2 -1.54e-02 24.00 0.00 151 sin(100000*Pi)<br />
501502F9 +1.00e+10 BEF99A64 -4.88e-01 BEF99A64 -4.88e-01 24.00 0.00 187 sin(1e10)<br />
7E967699 +1.00e+38 3F7D39E2 +9.89e-01 3F7D39E2 +9.89e-01 24.00 0.00 186 sin(1e38)<br />
------ ------ ------ -----------------<br />
336.00 0.00 1706 Total<br />
<br />
cosf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 3 cos(1e-4)<br />
3A83126F +1.00e-03 3F7FFFF8 +1.00e+00 3F7FFFF8 +1.00e+00 24.00 0.00 48 cos(1e-3)<br />
3C23D70A +1.00e-02 3F7FFCB9 +1.00e+00 3F7FFCB9 +1.00e+00 24.00 0.00 48 cos(1e-2)<br />
3DCCCCCD +1.00e-01 3F7EB898 +9.95e-01 3F7EB898 +9.95e-01 24.00 0.00 48 cos(1e-1)<br />
3F800000 +1.00e+00 3F0A5140 +5.40e-01 3F0A5140 +5.40e-01 24.00 0.00 136 cos(1)<br />
3FBC7F84 +1.47e+00 3DC8B2D2 +9.80e-02 3DC8B2D2 +9.80e-02 24.00 0.00 103 cos(1.47264147)<br />
3FC90FE7 +1.57e+00 B5C5DDE9 -1.47e-06 B5C5DDE9 -1.47e-06 24.00 0.00 103 cos(1.57079780)<br />
40C90FE6 +6.28e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 136 cos(6.28319073)<br />
43B18000 +3.55e+02 BF800000 -1.00e+00 BF800000 -1.00e+00 24.00 0.00 180 cos(355)<br />
489965E8 +3.14e+05 3F7FF845 +1.00e+00 3F7FF845 +1.00e+00 24.00 0.00 180 cos(100000*Pi)<br />
501502F9 +1.00e+10 3F5F84C5 +8.73e-01 3F5F84C5 +8.73e-01 24.00 0.00 183 cos(1e10)<br />
7E967699 +1.00e+38 3E1655CD +1.47e-01 3E1655CD +1.47e-01 24.00 0.00 182 cos(1e38)<br />
------ ------ ------ -----------------<br />
288.00 0.00 1350 Total<br />
<br />
tanf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 25 tan(1e-4)<br />
3A83126F +1.00e-03 3A831272 +1.00e-03 3A831272 +1.00e-03 24.00 0.00 74 tan(1e-3)<br />
3C23D70A +1.00e-02 3C23D870 +1.00e-02 3C23D870 +1.00e-02 24.00 0.00 74 tan(1e-2)<br />
3DCCCCCD +1.00e-01 3DCD7C44 +1.00e-01 3DCD7C44 +1.00e-01 24.00 0.00 73 tan(1e-1)<br />
3F800000 +1.00e+00 3FC75923 +1.56e+00 3FC75923 +1.56e+00 24.00 0.00 258 tan(1)<br />
40CEAB45 +6.46e+00 3E35493C +1.77e-01 3E35493C +1.77e-01 24.00 0.00 258 tan(6.45840693)<br />
43B18000 +3.55e+02 37FCDE82 +3.01e-05 37FCDE82 +3.01e-05 24.00 0.00 282 tan(355)<br />
489965E8 +3.14e+05 BC7BA94B -1.54e-02 BC7BA94B -1.54e-02 24.00 0.00 273 tan(100000*Pi)<br />
501502F9 +1.00e+10 BF0EF000 -5.58e-01 BF0EF000 -5.58e-01 24.00 0.00 304 tan(1e10)<br />
7E967699 +1.00e+38 40D79AC2 +6.74e+00 40D79AC2 +6.74e+00 24.00 0.00 321 tan(1e38)<br />
------ ------ ------ -----------------<br />
240.00 0.00 1942 Total<br />
<br />
expf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
00000000 +0.00e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 3 expf(0)<br />
3727C5AC +1.00e-05 3F800054 +1.00e+00 3F800054 +1.00e+00 24.00 0.00 44 expf(1e-5)<br />
38D1B717 +1.00e-04 3F800347 +1.00e+00 3F800347 +1.00e+00 24.00 0.00 44 expf(1e-4)<br />
3951B717 +2.00e-04 3F80068E +1.00e+00 3F80068E +1.00e+00 24.00 0.00 44 expf(2e-4)<br />
39D1B717 +4.00e-04 3F800D1C +1.00e+00 3F800D1C +1.00e+00 24.00 0.00 43 expf(4e-4)<br />
39EBEDFA +4.50e-04 3F800EC0 +1.00e+00 3F800EC0 +1.00e+00 24.00 0.00 44 expf(4.5e-4)<br />
3A83126F +1.00e-03 3F8020C9 +1.00e+00 3F8020C9 +1.00e+00 24.00 0.00 44 expf(1e-3)<br />
3E80A138 +2.51e-01 3FA48EBB +1.29e+00 3FA48EBB +1.29e+00 24.00 0.00 81 expf(0.25123)<br />
3F0D1D69 +5.51e-01 3FDE2123 +1.74e+00 3FDE2123 +1.74e+00 24.00 0.00 80 expf(0.55123)<br />
4101999A +8.10e+00 454DE782 +3.29e+03 454DE782 +3.29e+03 24.00 0.00 81 expf(8.1)<br />
4180CCCD +1.61e+01 4B15DA03 +9.82e+06 4B15DA03 +9.82e+06 24.00 0.00 81 expf(16.1)<br />
------ ------ ------ -----------------<br />
264.00 0.00 589 Total<br />
<br />
logf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 C13834F1 -1.15e+01 C13834F1 -1.15e+01 24.00 0.00 158 logf(1e-5)<br />
44800000 +1.02e+03 40DDCE9E +6.93e+00 40DDCE9E +6.93e+00 24.00 0.00 100 logf(1024)<br />
45828A00 +4.18e+03 41056606 +8.34e+00 41056606 +8.34e+00 24.00 0.00 140 logf(4177.25)<br />
------ ------ ------ -----------------<br />
72.00 0.00 398 Total<br />
<br />
sinhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3727C5AC +1.00e-05 3727C5AC +1.00e-05 24.00 0.00 22 sinhf(1e-5)<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 23 sinhf(1e-4)<br />
3951B717 +2.00e-04 3951B717 +2.00e-04 3951B717 +2.00e-04 24.00 0.00 23 sinhf(2e-4)<br />
39D1B717 +4.00e-04 39D1B717 +4.00e-04 39D1B717 +4.00e-04 24.00 0.00 60 sinhf(4e-4)<br />
39EBEDFA +4.50e-04 39EBEDFB +4.50e-04 39EBEDFB +4.50e-04 24.00 0.00 59 sinhf(4.5e-4)<br />
3A83126F +1.00e-03 3A831270 +1.00e-03 3A831270 +1.00e-03 24.00 0.00 60 sinhf(1e-3)<br />
3E80A138 +2.51e-01 3E81FCB6 +2.54e-01 3E81FCB6 +2.54e-01 24.00 0.00 60 sinhf(0.25123)<br />
3F0D1D69 +5.51e-01 3F145EE3 +5.80e-01 3F145EE3 +5.80e-01 24.00 0.00 119 sinhf(0.55123)<br />
4101999A +8.10e+00 44CDE781 +1.65e+03 44CDE781 +1.65e+03 24.00 0.00 121 sinhf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 108 sinhf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 655 Total<br />
<br />
coshf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 28 coshf(1e-5)<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 28 coshf(1e-4)<br />
3951B717 +2.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 29 coshf(2e-4)<br />
39D1B717 +4.00e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 48 coshf(4e-4)<br />
39EBEDFA +4.50e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 48 coshf(4.5e-4)<br />
3A83126F +1.00e-03 3F800004 +1.00e+00 3F800004 +1.00e+00 24.00 0.00 47 coshf(1e-3)<br />
3E80A138 +2.51e-01 3F840F8D +1.03e+00 3F840F8D +1.03e+00 24.00 0.00 48 coshf(0.25123)<br />
3F0D1D69 +5.51e-01 3F93F1B2 +1.16e+00 3F93F1B2 +1.16e+00 24.00 0.00 111 coshf(0.55123)<br />
4101999A +8.10e+00 44CDE784 +1.65e+03 44CDE784 +1.65e+03 24.00 0.00 114 coshf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 100 coshf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 601 Total<br />
<br />
tanhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3E800000 +2.50e-01 3E7ACBF5 +2.45e-01 3E7ACBF5 +2.45e-01 24.00 0.00 66 tanhf(0.25)<br />
3F800000 +1.00e+00 3F42F7D6 +7.62e-01 3F42F7D6 +7.62e-01 24.00 0.00 108 tanhf(1)<br />
41200000 +1.00e+01 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 18 tanhf(10)<br />
------ ------ ------ -----------------<br />
72.00 0.00 192 Total<br />
======= ====== ====== =================<br />
1752.00 0.00 7433 Grand Total<br />
======= ====== ====== =================</nowiki><br />
<br />
== RISC-V performance ==<br />
<br />
=== Basic arithmetic performance (RV32IMAC) ===<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on a RISC-V RV32IMAC microcontroller (GigaDevice GD32VF103):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: RV32IMAC<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 45 60 49.5 Random distribution over (0, 1), operands differ<br />
__subsf3 42 84 62.2 Random distribution over (0, 1), operands differ<br />
__mulsf3 37 57 39.3 Random distribution over (0, 1), operands differ<br />
__divsf3 67 70 67.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 15 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 10 14 10.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 10 17 10.0 Random distribution over (0, 1), operands differ<br />
__gesf2 11 14 11.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 10 13 10.0 Random distribution over (0, 1), operands differ<br />
__nesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__adddf3 52 89 62.8 Random distribution over (0, 1), operands differ<br />
__subdf3 60 123 82.8 Random distribution over (0, 1), operands differ<br />
__muldf3 68 88 75.0 Random distribution over (0, 1), operands differ<br />
__divdf3 192 204 197.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 15 20 16.0 Random distribution over (0, 1), operands differ<br />
__ledf2 15 19 16.0 Random distribution over (0, 1), operands differ<br />
__gtdf2 15 20 16.1 Random distribution over (0, 1), operands differ<br />
__gedf2 15 19 16.1 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 17 14.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution with magnitudes (1..2^31), signed<br />
__fixunssfsi 13 13 13.0 Random distribution with magnitudes (1..2^31)<br />
__fixsfdi 20 29 23.2 Random distribution with magnitudes (1..2^63), signed<br />
__fixunssfdi 15 23 18.9 Random distribution with magnitudes (1..2^63)<br />
__floatsisf 28 47 32.6 Random distribution with magnitudes (1..2^31), signed<br />
__floatunsisf 28 42 33.0 Random distribution with magnitudes (1..2^31)<br />
__floatdisf 39 66 49.1 Random distribution with magnitudes (1..2^63), signed<br />
__floatundisf 35 58 44.1 Random distribution with magnitudes (1..2^63)<br />
__fixdfsi 9 20 16.8 Random distribution with magnitudes (1..2^31), signed<br />
__fixunsdfsi 9 14 13.8 Random distribution with magnitudes (1..2^31)<br />
__fixdfdi 9 34 26.9 Random distribution with magnitudes (1..2^63), signed<br />
__fixunsdfdi 9 25 21.5 Random distribution with magnitudes (1..2^63)<br />
__floatsidf 28 47 31.6 Random distribution with magnitudes (1..2^31), signed<br />
__floatunsidf 19 32 23.9 Random distribution with magnitudes (1..2^31)<br />
__floatdidf 30 73 45.1 Random distribution with magnitudes (1..2^63), signed<br />
__floatundidf 27 62 39.3 Random distribution with magnitudes (1..2^63)<br />
__extendsfdf2 14 18 14.1 Random distribution with magnitudes (1..2^63), signed<br />
__truncdfsf2 25 36 25.1 Random distribution with magnitudes (1..2^63), signed</nowiki><br />
<br />
=== Mathematical function performance (RV32IMAC) ===<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on a RISC-V RV32IMAC microcontroller (GigaDevice GD32VF103):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: RV32IMAC<br />
<br />
sinf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 8 sin(1e-4)<br />
3A83126F +1.00e-03 3A83126E +1.00e-03 3A83126E +1.00e-03 24.00 0.00 70 sin(1e-3)<br />
3C23D70A +1.00e-02 3C23D657 +1.00e-02 3C23D657 +1.00e-02 24.00 0.00 67 sin(1e-2)<br />
3DCCCCCD +1.00e-01 3DCC7577 +9.98e-02 3DCC7577 +9.98e-02 24.00 0.00 67 sin(1e-1)<br />
3F800000 +1.00e+00 3F576AA4 +8.41e-01 3F576AA4 +8.41e-01 24.00 0.00 182 sin(1)<br />
3FBC7F84 +1.47e+00 3F7EC48E +9.95e-01 3F7EC48E +9.95e-01 24.00 0.00 193 sin(1.47264147)<br />
3FC90FAD +1.57e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 196 sin(1.57079089)<br />
40490FAC +3.14e+00 373A8886 +1.11e-05 373A8886 +1.11e-05 24.00 0.00 153 sin(3.14158154)<br />
421C4B56 +3.91e+01 3F7B14E5 +9.81e-01 3F7B14E5 +9.81e-01 24.00 0.00 193 sin(39.0735703)<br />
43B18000 +3.55e+02 B7FCDE82 -3.01e-05 B7FCDE82 -3.01e-05 24.00 0.00 219 sin(355)<br />
49800036 +1.05e+06 3F384A92 +7.20e-01 3F384A92 +7.20e-01 24.00 0.00 236 sin(1048582.75)<br />
489965E8 +3.14e+05 BC7BA1B2 -1.54e-02 BC7BA1B2 -1.54e-02 24.00 0.00 214 sin(100000*Pi)<br />
501502F9 +1.00e+10 BEF99A64 -4.88e-01 BEF99A64 -4.88e-01 24.00 0.00 255 sin(1e10)<br />
7E967699 +1.00e+38 3F7D39E2 +9.89e-01 3F7D39E2 +9.89e-01 24.00 0.00 248 sin(1e38)<br />
------ ------ ------ -----------------<br />
336.00 0.00 2301 Total<br />
<br />
cosf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 10 cos(1e-4)<br />
3A83126F +1.00e-03 3F7FFFF8 +1.00e+00 3F7FFFF8 +1.00e+00 24.00 0.00 50 cos(1e-3)<br />
3C23D70A +1.00e-02 3F7FFCB9 +1.00e+00 3F7FFCB9 +1.00e+00 24.00 0.00 43 cos(1e-2)<br />
3DCCCCCD +1.00e-01 3F7EB898 +9.95e-01 3F7EB898 +9.95e-01 24.00 0.00 43 cos(1e-1)<br />
3F800000 +1.00e+00 3F0A5140 +5.40e-01 3F0A5140 +5.40e-01 24.00 0.00 186 cos(1)<br />
3FBC7F84 +1.47e+00 3DC8B2D2 +9.80e-02 3DC8B2D2 +9.80e-02 24.00 0.00 158 cos(1.47264147)<br />
3FC90FE7 +1.57e+00 B5C5DDE9 -1.47e-06 B5C5DDE9 -1.47e-06 24.00 0.00 161 cos(1.57079780)<br />
40C90FE6 +6.28e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 190 cos(6.28319073)<br />
43B18000 +3.55e+02 BF800000 -1.00e+00 BF800000 -1.00e+00 24.00 0.00 252 cos(355)<br />
489965E8 +3.14e+05 3F7FF845 +1.00e+00 3F7FF845 +1.00e+00 24.00 0.00 251 cos(100000*Pi)<br />
501502F9 +1.00e+10 3F5F84C5 +8.73e-01 3F5F84C5 +8.73e-01 24.00 0.00 245 cos(1e10)<br />
7E967699 +1.00e+38 3E1655CD +1.47e-01 3E1655CD +1.47e-01 24.00 0.00 257 cos(1e38)<br />
------ ------ ------ -----------------<br />
288.00 0.00 1846 Total<br />
<br />
tanf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 7 tan(1e-4)<br />
3A83126F +1.00e-03 3A831272 +1.00e-03 3A831272 +1.00e-03 24.00 0.00 92 tan(1e-3)<br />
3C23D70A +1.00e-02 3C23D870 +1.00e-02 3C23D870 +1.00e-02 24.00 0.00 87 tan(1e-2)<br />
3DCCCCCD +1.00e-01 3DCD7C44 +1.00e-01 3DCD7C44 +1.00e-01 24.00 0.00 86 tan(1e-1)<br />
3F800000 +1.00e+00 3FC75923 +1.56e+00 3FC75923 +1.56e+00 24.00 0.00 403 tan(1)<br />
40CEAB45 +6.46e+00 3E35493C +1.77e-01 3E35493C +1.77e-01 24.00 0.00 397 tan(6.45840693)<br />
43B18000 +3.55e+02 37FCDE82 +3.01e-05 37FCDE82 +3.01e-05 24.00 0.00 444 tan(355)<br />
489965E8 +3.14e+05 BC7BA94B -1.54e-02 BC7BA94B -1.54e-02 24.00 0.00 430 tan(100000*Pi)<br />
501502F9 +1.00e+10 BF0EF000 -5.58e-01 BF0EF000 -5.58e-01 24.00 0.00 458 tan(1e10)<br />
7E967699 +1.00e+38 40D79AC2 +6.74e+00 40D79AC2 +6.74e+00 24.00 0.00 483 tan(1e38)<br />
------ ------ ------ -----------------<br />
240.00 0.00 2887 Total<br />
<br />
expf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
00000000 +0.00e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 10 expf(0)<br />
3727C5AC +1.00e-05 3F800054 +1.00e+00 3F800054 +1.00e+00 24.00 0.00 45 expf(1e-5)<br />
38D1B717 +1.00e-04 3F800347 +1.00e+00 3F800347 +1.00e+00 24.00 0.00 41 expf(1e-4)<br />
3951B717 +2.00e-04 3F80068E +1.00e+00 3F80068E +1.00e+00 24.00 0.00 38 expf(2e-4)<br />
39D1B717 +4.00e-04 3F800D1C +1.00e+00 3F800D1C +1.00e+00 24.00 0.00 38 expf(4e-4)<br />
39EBEDFA +4.50e-04 3F800EC0 +1.00e+00 3F800EC0 +1.00e+00 24.00 0.00 38 expf(4.5e-4)<br />
3A83126F +1.00e-03 3F8020C9 +1.00e+00 3F8020C9 +1.00e+00 24.00 0.00 38 expf(1e-3)<br />
3E80A138 +2.51e-01 3FA48EBB +1.29e+00 3FA48EBB +1.29e+00 24.00 0.00 86 expf(0.25123)<br />
3F0D1D69 +5.51e-01 3FDE2123 +1.74e+00 3FDE2123 +1.74e+00 24.00 0.00 89 expf(0.55123)<br />
4101999A +8.10e+00 454DE782 +3.29e+03 454DE782 +3.29e+03 24.00 0.00 88 expf(8.1)<br />
4180CCCD +1.61e+01 4B15DA03 +9.82e+06 4B15DA03 +9.82e+06 24.00 0.00 86 expf(16.1)<br />
------ ------ ------ -----------------<br />
264.00 0.00 597 Total<br />
<br />
logf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 C13834F1 -1.15e+01 C13834F1 -1.15e+01 24.00 0.00 265 logf(1e-5)<br />
44800000 +1.02e+03 40DDCE9E +6.93e+00 40DDCE9E +6.93e+00 24.00 0.00 183 logf(1024)<br />
45828A00 +4.18e+03 41056606 +8.34e+00 41056606 +8.34e+00 24.00 0.00 240 logf(4177.25)<br />
------ ------ ------ -----------------<br />
72.00 0.00 688 Total<br />
<br />
sinhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3727C5AC +1.00e-05 3727C5AC +1.00e-05 24.00 0.00 14 sinhf(1e-5)<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 14 sinhf(1e-4)<br />
3951B717 +2.00e-04 3951B717 +2.00e-04 3951B717 +2.00e-04 24.00 0.00 13 sinhf(2e-4)<br />
39D1B717 +4.00e-04 39D1B717 +4.00e-04 39D1B717 +4.00e-04 24.00 0.00 67 sinhf(4e-4)<br />
39EBEDFA +4.50e-04 39EBEDFB +4.50e-04 39EBEDFB +4.50e-04 24.00 0.00 59 sinhf(4.5e-4)<br />
3A83126F +1.00e-03 3A831270 +1.00e-03 3A831270 +1.00e-03 24.00 0.00 59 sinhf(1e-3)<br />
3E80A138 +2.51e-01 3E81FCB6 +2.54e-01 3E81FCB6 +2.54e-01 24.00 0.00 59 sinhf(0.25123)<br />
3F0D1D69 +5.51e-01 3F145EE3 +5.80e-01 3F145EE3 +5.80e-01 24.00 0.00 137 sinhf(0.55123)<br />
4101999A +8.10e+00 44CDE781 +1.65e+03 44CDE781 +1.65e+03 24.00 0.00 133 sinhf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 112 sinhf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 667 Total<br />
<br />
coshf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 26 coshf(1e-5)<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 24 coshf(1e-4)<br />
3951B717 +2.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 24 coshf(2e-4)<br />
39D1B717 +4.00e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 50 coshf(4e-4)<br />
39EBEDFA +4.50e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 50 coshf(4.5e-4)<br />
3A83126F +1.00e-03 3F800004 +1.00e+00 3F800004 +1.00e+00 24.00 0.00 50 coshf(1e-3)<br />
3E80A138 +2.51e-01 3F840F8D +1.03e+00 3F840F8D +1.03e+00 24.00 0.00 50 coshf(0.25123)<br />
3F0D1D69 +5.51e-01 3F93F1B2 +1.16e+00 3F93F1B2 +1.16e+00 24.00 0.00 140 coshf(0.55123)<br />
4101999A +8.10e+00 44CDE784 +1.65e+03 44CDE784 +1.65e+03 24.00 0.00 139 coshf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 126 coshf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 679 Total<br />
<br />
tanhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3E800000 +2.50e-01 3E7ACBF5 +2.45e-01 3E7ACBF5 +2.45e-01 24.00 0.00 89 tanhf(0.25)<br />
3F800000 +1.00e+00 3F42F7D6 +7.62e-01 3F42F7D6 +7.62e-01 24.00 0.00 145 tanhf(1)<br />
41200000 +1.00e+01 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 14 tanhf(10)<br />
------ ------ ------ -----------------<br />
72.00 0.00 248 Total<br />
======= ====== ====== =================<br />
1752.00 0.00 9913 Grand Total<br />
======= ====== ====== =================</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=SEGGER_Floating-Point_Library&diff=6819
SEGGER Floating-Point Library
2020-01-31T17:25:12Z
<p>Paul: </p>
<hr />
<div>The SEGGER Floating-Point Library is an essential part of the SEGGER Runtime Library. It is available stand-alone or as part of the SEGGER Runtime Library package, and already included in the use of SEGGER Embedded Studio.<br />
<br />
The floating-point library contains complete, fully optimized and verified floating point functionality, which is required for devices without an FPU. The floating-point emulator, a crucial part of the floating-point library, of the Arm and RISC-V variants are written in assembly language, optimized either for small code size or increased execution speed. For other processor architectures the library has a portable C implementation.<br />
<br />
For more information, refer to https://www.segger.com/products/development-tools/runtime-library/technology/floating-point-library<br />
<br />
== Explicit Function Performance on Arm ==<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on an Arm Cortex-M4 microcontroller (NXP K66FN2M0):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: Cortex-M<br />
<br />
sinf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 21 sin(1e-4)<br />
3A83126F +1.00e-03 3A83126E +1.00e-03 3A83126E +1.00e-03 24.00 0.00 55 sin(1e-3)<br />
3C23D70A +1.00e-02 3C23D657 +1.00e-02 3C23D657 +1.00e-02 24.00 0.00 55 sin(1e-2)<br />
3DCCCCCD +1.00e-01 3DCC7577 +9.98e-02 3DCC7577 +9.98e-02 24.00 0.00 54 sin(1e-1)<br />
3F800000 +1.00e+00 3F576AA4 +8.41e-01 3F576AA4 +8.41e-01 24.00 0.00 139 sin(1)<br />
3FBC7F84 +1.47e+00 3F7EC48E +9.95e-01 3F7EC48E +9.95e-01 24.00 0.00 138 sin(1.47264147)<br />
3FC90FAD +1.57e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 138 sin(1.57079089)<br />
40490FAC +3.14e+00 373A8886 +1.11e-05 373A8886 +1.11e-05 24.00 0.00 106 sinf(3.14158154)<br />
421C4B56 +3.91e+01 3F7B14E5 +9.81e-01 3F7B14E5 +9.81e-01 24.00 0.00 148 sin(39.0735703)<br />
43B18000 +3.55e+02 B7FCDE82 -3.01e-05 B7FCDE82 -3.01e-05 24.00 0.00 152 sin(355)<br />
49800036 +1.05e+06 3F384A92 +7.20e-01 3F384A92 +7.20e-01 24.00 0.00 176 sin(1048582.75)<br />
489965E8 +3.14e+05 BC7BA1B2 -1.54e-02 BC7BA1B2 -1.54e-02 24.00 0.00 151 sin(100000*Pi)<br />
501502F9 +1.00e+10 BEF99A64 -4.88e-01 BEF99A64 -4.88e-01 24.00 0.00 187 sin(1e10)<br />
7E967699 +1.00e+38 3F7D39E2 +9.89e-01 3F7D39E2 +9.89e-01 24.00 0.00 186 sin(1e38)<br />
------ ------ ------ -----------------<br />
336.00 0.00 1706 Total<br />
<br />
cosf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 3 cos(1e-4)<br />
3A83126F +1.00e-03 3F7FFFF8 +1.00e+00 3F7FFFF8 +1.00e+00 24.00 0.00 48 cos(1e-3)<br />
3C23D70A +1.00e-02 3F7FFCB9 +1.00e+00 3F7FFCB9 +1.00e+00 24.00 0.00 48 cos(1e-2)<br />
3DCCCCCD +1.00e-01 3F7EB898 +9.95e-01 3F7EB898 +9.95e-01 24.00 0.00 48 cos(1e-1)<br />
3F800000 +1.00e+00 3F0A5140 +5.40e-01 3F0A5140 +5.40e-01 24.00 0.00 136 cos(1)<br />
3FBC7F84 +1.47e+00 3DC8B2D2 +9.80e-02 3DC8B2D2 +9.80e-02 24.00 0.00 103 cos(1.47264147)<br />
3FC90FE7 +1.57e+00 B5C5DDE9 -1.47e-06 B5C5DDE9 -1.47e-06 24.00 0.00 103 cos(1.57079780)<br />
40C90FE6 +6.28e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 136 cos(6.28319073)<br />
43B18000 +3.55e+02 BF800000 -1.00e+00 BF800000 -1.00e+00 24.00 0.00 180 cos(355)<br />
489965E8 +3.14e+05 3F7FF845 +1.00e+00 3F7FF845 +1.00e+00 24.00 0.00 180 cos(100000*Pi)<br />
501502F9 +1.00e+10 3F5F84C5 +8.73e-01 3F5F84C5 +8.73e-01 24.00 0.00 183 cos(1e10)<br />
7E967699 +1.00e+38 3E1655CD +1.47e-01 3E1655CD +1.47e-01 24.00 0.00 182 cos(1e38)<br />
------ ------ ------ -----------------<br />
288.00 0.00 1350 Total<br />
<br />
tanf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 25 tan(1e-4)<br />
3A83126F +1.00e-03 3A831272 +1.00e-03 3A831272 +1.00e-03 24.00 0.00 74 tan(1e-3)<br />
3C23D70A +1.00e-02 3C23D870 +1.00e-02 3C23D870 +1.00e-02 24.00 0.00 74 tan(1e-2)<br />
3DCCCCCD +1.00e-01 3DCD7C44 +1.00e-01 3DCD7C44 +1.00e-01 24.00 0.00 73 tan(1e-1)<br />
3F800000 +1.00e+00 3FC75923 +1.56e+00 3FC75923 +1.56e+00 24.00 0.00 258 tan(1)<br />
40CEAB45 +6.46e+00 3E35493C +1.77e-01 3E35493C +1.77e-01 24.00 0.00 258 tan(6.45840693)<br />
43B18000 +3.55e+02 37FCDE82 +3.01e-05 37FCDE82 +3.01e-05 24.00 0.00 282 tan(355)<br />
489965E8 +3.14e+05 BC7BA94B -1.54e-02 BC7BA94B -1.54e-02 24.00 0.00 273 tan(100000*Pi)<br />
501502F9 +1.00e+10 BF0EF000 -5.58e-01 BF0EF000 -5.58e-01 24.00 0.00 304 tan(1e10)<br />
7E967699 +1.00e+38 40D79AC2 +6.74e+00 40D79AC2 +6.74e+00 24.00 0.00 321 tan(1e38)<br />
------ ------ ------ -----------------<br />
240.00 0.00 1942 Total<br />
<br />
expf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
00000000 +0.00e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 3 expf(0)<br />
3727C5AC +1.00e-05 3F800054 +1.00e+00 3F800054 +1.00e+00 24.00 0.00 44 expf(1e-5)<br />
38D1B717 +1.00e-04 3F800347 +1.00e+00 3F800347 +1.00e+00 24.00 0.00 44 expf(1e-4)<br />
3951B717 +2.00e-04 3F80068E +1.00e+00 3F80068E +1.00e+00 24.00 0.00 44 expf(2e-4)<br />
39D1B717 +4.00e-04 3F800D1C +1.00e+00 3F800D1C +1.00e+00 24.00 0.00 43 expf(4e-4)<br />
39EBEDFA +4.50e-04 3F800EC0 +1.00e+00 3F800EC0 +1.00e+00 24.00 0.00 44 expf(4.5e-4)<br />
3A83126F +1.00e-03 3F8020C9 +1.00e+00 3F8020C9 +1.00e+00 24.00 0.00 44 expf(1e-3)<br />
3E80A138 +2.51e-01 3FA48EBB +1.29e+00 3FA48EBB +1.29e+00 24.00 0.00 81 expf(0.25123)<br />
3F0D1D69 +5.51e-01 3FDE2123 +1.74e+00 3FDE2123 +1.74e+00 24.00 0.00 80 expf(0.55123)<br />
4101999A +8.10e+00 454DE782 +3.29e+03 454DE782 +3.29e+03 24.00 0.00 81 expf(8.1)<br />
4180CCCD +1.61e+01 4B15DA03 +9.82e+06 4B15DA03 +9.82e+06 24.00 0.00 81 expf(16.1)<br />
------ ------ ------ -----------------<br />
264.00 0.00 589 Total<br />
<br />
logf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 C13834F1 -1.15e+01 C13834F1 -1.15e+01 24.00 0.00 158 logf(1e-5)<br />
44800000 +1.02e+03 40DDCE9E +6.93e+00 40DDCE9E +6.93e+00 24.00 0.00 100 logf(1024)<br />
45828A00 +4.18e+03 41056606 +8.34e+00 41056606 +8.34e+00 24.00 0.00 140 logf(4177.25)<br />
------ ------ ------ -----------------<br />
72.00 0.00 398 Total<br />
<br />
sinhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3727C5AC +1.00e-05 3727C5AC +1.00e-05 24.00 0.00 22 sinhf(1e-5)<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 23 sinhf(1e-4)<br />
3951B717 +2.00e-04 3951B717 +2.00e-04 3951B717 +2.00e-04 24.00 0.00 23 sinhf(2e-4)<br />
39D1B717 +4.00e-04 39D1B717 +4.00e-04 39D1B717 +4.00e-04 24.00 0.00 60 sinhf(4e-4)<br />
39EBEDFA +4.50e-04 39EBEDFB +4.50e-04 39EBEDFB +4.50e-04 24.00 0.00 59 sinhf(4.5e-4)<br />
3A83126F +1.00e-03 3A831270 +1.00e-03 3A831270 +1.00e-03 24.00 0.00 60 sinhf(1e-3)<br />
3E80A138 +2.51e-01 3E81FCB6 +2.54e-01 3E81FCB6 +2.54e-01 24.00 0.00 60 sinhf(0.25123)<br />
3F0D1D69 +5.51e-01 3F145EE3 +5.80e-01 3F145EE3 +5.80e-01 24.00 0.00 119 sinhf(0.55123)<br />
4101999A +8.10e+00 44CDE781 +1.65e+03 44CDE781 +1.65e+03 24.00 0.00 121 sinhf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 108 sinhf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 655 Total<br />
<br />
coshf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 28 coshf(1e-5)<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 28 coshf(1e-4)<br />
3951B717 +2.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 29 coshf(2e-4)<br />
39D1B717 +4.00e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 48 coshf(4e-4)<br />
39EBEDFA +4.50e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 48 coshf(4.5e-4)<br />
3A83126F +1.00e-03 3F800004 +1.00e+00 3F800004 +1.00e+00 24.00 0.00 47 coshf(1e-3)<br />
3E80A138 +2.51e-01 3F840F8D +1.03e+00 3F840F8D +1.03e+00 24.00 0.00 48 coshf(0.25123)<br />
3F0D1D69 +5.51e-01 3F93F1B2 +1.16e+00 3F93F1B2 +1.16e+00 24.00 0.00 111 coshf(0.55123)<br />
4101999A +8.10e+00 44CDE784 +1.65e+03 44CDE784 +1.65e+03 24.00 0.00 114 coshf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 100 coshf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 601 Total<br />
<br />
tanhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3E800000 +2.50e-01 3E7ACBF5 +2.45e-01 3E7ACBF5 +2.45e-01 24.00 0.00 66 tanhf(0.25)<br />
3F800000 +1.00e+00 3F42F7D6 +7.62e-01 3F42F7D6 +7.62e-01 24.00 0.00 108 tanhf(1)<br />
41200000 +1.00e+01 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 18 tanhf(10)<br />
------ ------ ------ -----------------<br />
72.00 0.00 192 Total<br />
======= ====== ====== =================<br />
1752.00 0.00 7433 Grand Total<br />
======= ====== ====== =================</nowiki><br />
<br />
== Basic function performance on RISC-V ==<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on a RISC-V RV32IMAC microcontroller (GigaDevice GD32VF103):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: RV32IMAC<br />
<br />
Function Min Max Avg Description<br />
-------------- ------ ------ ------ -------------------------------<br />
__addsf3 45 60 49.5 Random distribution over (0, 1), operands differ<br />
__subsf3 42 84 62.2 Random distribution over (0, 1), operands differ<br />
__mulsf3 37 57 39.3 Random distribution over (0, 1), operands differ<br />
__divsf3 67 70 67.0 Random distribution over (0, 1), operands differ<br />
__ltsf2 11 15 11.0 Random distribution over (0, 1), operands differ<br />
__lesf2 10 14 10.0 Random distribution over (0, 1), operands differ<br />
__gtsf2 10 17 10.0 Random distribution over (0, 1), operands differ<br />
__gesf2 11 14 11.0 Random distribution over (0, 1), operands differ<br />
__eqsf2 10 13 10.0 Random distribution over (0, 1), operands differ<br />
__nesf2 10 10 10.0 Random distribution over (0, 1), operands differ<br />
__adddf3 52 89 62.8 Random distribution over (0, 1), operands differ<br />
__subdf3 60 123 82.8 Random distribution over (0, 1), operands differ<br />
__muldf3 68 88 75.0 Random distribution over (0, 1), operands differ<br />
__divdf3 192 204 197.2 Random distribution over (0, 1), operands differ<br />
__ltdf2 15 20 16.0 Random distribution over (0, 1), operands differ<br />
__ledf2 15 19 16.0 Random distribution over (0, 1), operands differ<br />
__gtdf2 15 20 16.1 Random distribution over (0, 1), operands differ<br />
__gedf2 15 19 16.1 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 17 14.0 Random distribution over (0, 1), operands differ<br />
__eqdf2 14 14 14.0 Random distribution over (0, 1), operands differ<br />
__fixsfsi 14 14 14.0 Random distribution with magnitudes (1..2^31), signed<br />
__fixunssfsi 13 13 13.0 Random distribution with magnitudes (1..2^31)<br />
__fixsfdi 20 29 23.2 Random distribution with magnitudes (1..2^63), signed<br />
__fixunssfdi 15 23 18.9 Random distribution with magnitudes (1..2^63)<br />
__floatsisf 28 47 32.6 Random distribution with magnitudes (1..2^31), signed<br />
__floatunsisf 28 42 33.0 Random distribution with magnitudes (1..2^31)<br />
__floatdisf 39 66 49.1 Random distribution with magnitudes (1..2^63), signed<br />
__floatundisf 35 58 44.1 Random distribution with magnitudes (1..2^63)<br />
__fixdfsi 9 20 16.8 Random distribution with magnitudes (1..2^31), signed<br />
__fixunsdfsi 9 14 13.8 Random distribution with magnitudes (1..2^31)<br />
__fixdfdi 9 34 26.9 Random distribution with magnitudes (1..2^63), signed<br />
__fixunsdfdi 9 25 21.5 Random distribution with magnitudes (1..2^63)<br />
__floatsidf 28 47 31.6 Random distribution with magnitudes (1..2^31), signed<br />
__floatunsidf 19 32 23.9 Random distribution with magnitudes (1..2^31)<br />
__floatdidf 30 73 45.1 Random distribution with magnitudes (1..2^63), signed<br />
__floatundidf 27 62 39.3 Random distribution with magnitudes (1..2^63)<br />
__extendsfdf2 14 18 14.1 Random distribution with magnitudes (1..2^63), signed<br />
__truncdfsf2 25 36 25.1 Random distribution with magnitudes (1..2^63), signed</nowiki><br />
<br />
== Explicit Function Performance on RISC-V ==<br />
<br />
These are the detailed results of the IEEE-754 Floating-point Benchmark run on a RISC-V RV32IMAC microcontroller (GigaDevice GD32VF103):<br />
<br />
<nowiki>IEEE-754 Floating-point Library Benchmarks<br />
Copyright (c) 2018-2020 SEGGER Microcontroller GmbH.<br />
<br />
Target: RV32IMAC<br />
<br />
sinf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 8 sin(1e-4)<br />
3A83126F +1.00e-03 3A83126E +1.00e-03 3A83126E +1.00e-03 24.00 0.00 70 sin(1e-3)<br />
3C23D70A +1.00e-02 3C23D657 +1.00e-02 3C23D657 +1.00e-02 24.00 0.00 67 sin(1e-2)<br />
3DCCCCCD +1.00e-01 3DCC7577 +9.98e-02 3DCC7577 +9.98e-02 24.00 0.00 67 sin(1e-1)<br />
3F800000 +1.00e+00 3F576AA4 +8.41e-01 3F576AA4 +8.41e-01 24.00 0.00 182 sin(1)<br />
3FBC7F84 +1.47e+00 3F7EC48E +9.95e-01 3F7EC48E +9.95e-01 24.00 0.00 193 sin(1.47264147)<br />
3FC90FAD +1.57e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 196 sin(1.57079089)<br />
40490FAC +3.14e+00 373A8886 +1.11e-05 373A8886 +1.11e-05 24.00 0.00 153 sin(3.14158154)<br />
421C4B56 +3.91e+01 3F7B14E5 +9.81e-01 3F7B14E5 +9.81e-01 24.00 0.00 193 sin(39.0735703)<br />
43B18000 +3.55e+02 B7FCDE82 -3.01e-05 B7FCDE82 -3.01e-05 24.00 0.00 219 sin(355)<br />
49800036 +1.05e+06 3F384A92 +7.20e-01 3F384A92 +7.20e-01 24.00 0.00 236 sin(1048582.75)<br />
489965E8 +3.14e+05 BC7BA1B2 -1.54e-02 BC7BA1B2 -1.54e-02 24.00 0.00 214 sin(100000*Pi)<br />
501502F9 +1.00e+10 BEF99A64 -4.88e-01 BEF99A64 -4.88e-01 24.00 0.00 255 sin(1e10)<br />
7E967699 +1.00e+38 3F7D39E2 +9.89e-01 3F7D39E2 +9.89e-01 24.00 0.00 248 sin(1e38)<br />
------ ------ ------ -----------------<br />
336.00 0.00 2301 Total<br />
<br />
cosf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 10 cos(1e-4)<br />
3A83126F +1.00e-03 3F7FFFF8 +1.00e+00 3F7FFFF8 +1.00e+00 24.00 0.00 50 cos(1e-3)<br />
3C23D70A +1.00e-02 3F7FFCB9 +1.00e+00 3F7FFCB9 +1.00e+00 24.00 0.00 43 cos(1e-2)<br />
3DCCCCCD +1.00e-01 3F7EB898 +9.95e-01 3F7EB898 +9.95e-01 24.00 0.00 43 cos(1e-1)<br />
3F800000 +1.00e+00 3F0A5140 +5.40e-01 3F0A5140 +5.40e-01 24.00 0.00 186 cos(1)<br />
3FBC7F84 +1.47e+00 3DC8B2D2 +9.80e-02 3DC8B2D2 +9.80e-02 24.00 0.00 158 cos(1.47264147)<br />
3FC90FE7 +1.57e+00 B5C5DDE9 -1.47e-06 B5C5DDE9 -1.47e-06 24.00 0.00 161 cos(1.57079780)<br />
40C90FE6 +6.28e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 190 cos(6.28319073)<br />
43B18000 +3.55e+02 BF800000 -1.00e+00 BF800000 -1.00e+00 24.00 0.00 252 cos(355)<br />
489965E8 +3.14e+05 3F7FF845 +1.00e+00 3F7FF845 +1.00e+00 24.00 0.00 251 cos(100000*Pi)<br />
501502F9 +1.00e+10 3F5F84C5 +8.73e-01 3F5F84C5 +8.73e-01 24.00 0.00 245 cos(1e10)<br />
7E967699 +1.00e+38 3E1655CD +1.47e-01 3E1655CD +1.47e-01 24.00 0.00 257 cos(1e38)<br />
------ ------ ------ -----------------<br />
288.00 0.00 1846 Total<br />
<br />
tanf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 7 tan(1e-4)<br />
3A83126F +1.00e-03 3A831272 +1.00e-03 3A831272 +1.00e-03 24.00 0.00 92 tan(1e-3)<br />
3C23D70A +1.00e-02 3C23D870 +1.00e-02 3C23D870 +1.00e-02 24.00 0.00 87 tan(1e-2)<br />
3DCCCCCD +1.00e-01 3DCD7C44 +1.00e-01 3DCD7C44 +1.00e-01 24.00 0.00 86 tan(1e-1)<br />
3F800000 +1.00e+00 3FC75923 +1.56e+00 3FC75923 +1.56e+00 24.00 0.00 403 tan(1)<br />
40CEAB45 +6.46e+00 3E35493C +1.77e-01 3E35493C +1.77e-01 24.00 0.00 397 tan(6.45840693)<br />
43B18000 +3.55e+02 37FCDE82 +3.01e-05 37FCDE82 +3.01e-05 24.00 0.00 444 tan(355)<br />
489965E8 +3.14e+05 BC7BA94B -1.54e-02 BC7BA94B -1.54e-02 24.00 0.00 430 tan(100000*Pi)<br />
501502F9 +1.00e+10 BF0EF000 -5.58e-01 BF0EF000 -5.58e-01 24.00 0.00 458 tan(1e10)<br />
7E967699 +1.00e+38 40D79AC2 +6.74e+00 40D79AC2 +6.74e+00 24.00 0.00 483 tan(1e38)<br />
------ ------ ------ -----------------<br />
240.00 0.00 2887 Total<br />
<br />
expf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
00000000 +0.00e+00 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 10 expf(0)<br />
3727C5AC +1.00e-05 3F800054 +1.00e+00 3F800054 +1.00e+00 24.00 0.00 45 expf(1e-5)<br />
38D1B717 +1.00e-04 3F800347 +1.00e+00 3F800347 +1.00e+00 24.00 0.00 41 expf(1e-4)<br />
3951B717 +2.00e-04 3F80068E +1.00e+00 3F80068E +1.00e+00 24.00 0.00 38 expf(2e-4)<br />
39D1B717 +4.00e-04 3F800D1C +1.00e+00 3F800D1C +1.00e+00 24.00 0.00 38 expf(4e-4)<br />
39EBEDFA +4.50e-04 3F800EC0 +1.00e+00 3F800EC0 +1.00e+00 24.00 0.00 38 expf(4.5e-4)<br />
3A83126F +1.00e-03 3F8020C9 +1.00e+00 3F8020C9 +1.00e+00 24.00 0.00 38 expf(1e-3)<br />
3E80A138 +2.51e-01 3FA48EBB +1.29e+00 3FA48EBB +1.29e+00 24.00 0.00 86 expf(0.25123)<br />
3F0D1D69 +5.51e-01 3FDE2123 +1.74e+00 3FDE2123 +1.74e+00 24.00 0.00 89 expf(0.55123)<br />
4101999A +8.10e+00 454DE782 +3.29e+03 454DE782 +3.29e+03 24.00 0.00 88 expf(8.1)<br />
4180CCCD +1.61e+01 4B15DA03 +9.82e+06 4B15DA03 +9.82e+06 24.00 0.00 86 expf(16.1)<br />
------ ------ ------ -----------------<br />
264.00 0.00 597 Total<br />
<br />
logf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 C13834F1 -1.15e+01 C13834F1 -1.15e+01 24.00 0.00 265 logf(1e-5)<br />
44800000 +1.02e+03 40DDCE9E +6.93e+00 40DDCE9E +6.93e+00 24.00 0.00 183 logf(1024)<br />
45828A00 +4.18e+03 41056606 +8.34e+00 41056606 +8.34e+00 24.00 0.00 240 logf(4177.25)<br />
------ ------ ------ -----------------<br />
72.00 0.00 688 Total<br />
<br />
sinhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3727C5AC +1.00e-05 3727C5AC +1.00e-05 24.00 0.00 14 sinhf(1e-5)<br />
38D1B717 +1.00e-04 38D1B717 +1.00e-04 38D1B717 +1.00e-04 24.00 0.00 14 sinhf(1e-4)<br />
3951B717 +2.00e-04 3951B717 +2.00e-04 3951B717 +2.00e-04 24.00 0.00 13 sinhf(2e-4)<br />
39D1B717 +4.00e-04 39D1B717 +4.00e-04 39D1B717 +4.00e-04 24.00 0.00 67 sinhf(4e-4)<br />
39EBEDFA +4.50e-04 39EBEDFB +4.50e-04 39EBEDFB +4.50e-04 24.00 0.00 59 sinhf(4.5e-4)<br />
3A83126F +1.00e-03 3A831270 +1.00e-03 3A831270 +1.00e-03 24.00 0.00 59 sinhf(1e-3)<br />
3E80A138 +2.51e-01 3E81FCB6 +2.54e-01 3E81FCB6 +2.54e-01 24.00 0.00 59 sinhf(0.25123)<br />
3F0D1D69 +5.51e-01 3F145EE3 +5.80e-01 3F145EE3 +5.80e-01 24.00 0.00 137 sinhf(0.55123)<br />
4101999A +8.10e+00 44CDE781 +1.65e+03 44CDE781 +1.65e+03 24.00 0.00 133 sinhf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 112 sinhf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 667 Total<br />
<br />
coshf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3727C5AC +1.00e-05 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 26 coshf(1e-5)<br />
38D1B717 +1.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 24 coshf(1e-4)<br />
3951B717 +2.00e-04 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 24 coshf(2e-4)<br />
39D1B717 +4.00e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 50 coshf(4e-4)<br />
39EBEDFA +4.50e-04 3F800001 +1.00e+00 3F800001 +1.00e+00 24.00 0.00 50 coshf(4.5e-4)<br />
3A83126F +1.00e-03 3F800004 +1.00e+00 3F800004 +1.00e+00 24.00 0.00 50 coshf(1e-3)<br />
3E80A138 +2.51e-01 3F840F8D +1.03e+00 3F840F8D +1.03e+00 24.00 0.00 50 coshf(0.25123)<br />
3F0D1D69 +5.51e-01 3F93F1B2 +1.16e+00 3F93F1B2 +1.16e+00 24.00 0.00 140 coshf(0.55123)<br />
4101999A +8.10e+00 44CDE784 +1.65e+03 44CDE784 +1.65e+03 24.00 0.00 139 coshf(8.1)<br />
4180CCCD +1.61e+01 4A95DA03 +4.91e+06 4A95DA03 +4.91e+06 24.00 0.00 126 coshf(16.1)<br />
------ ------ ------ -----------------<br />
240.00 0.00 679 Total<br />
<br />
tanhf() Bits Bits<br />
Input Expected Calculated Right Wrong Cycles Comment<br />
--------:--------- --------:--------- --------:--------- ----- ----- ------ -----------------<br />
3E800000 +2.50e-01 3E7ACBF5 +2.45e-01 3E7ACBF5 +2.45e-01 24.00 0.00 89 tanhf(0.25)<br />
3F800000 +1.00e+00 3F42F7D6 +7.62e-01 3F42F7D6 +7.62e-01 24.00 0.00 145 tanhf(1)<br />
41200000 +1.00e+01 3F800000 +1.00e+00 3F800000 +1.00e+00 24.00 0.00 14 tanhf(10)<br />
------ ------ ------ -----------------<br />
72.00 0.00 248 Total<br />
======= ====== ====== =================<br />
1752.00 0.00 9913 Grand Total<br />
======= ====== ====== =================</nowiki></div>
Paul
https://wiki.segger.com/index.php?title=C_runtime_library&diff=6542
C runtime library
2019-11-04T09:35:12Z
<p>Paul: </p>
<hr />
<div>[[Category:Knowledge Base]]<br />
The C runtime library is a collection of [[subroutine]]s that are needed to build a program in C.<br />
The subroutines can basically be put into 2 categories:<br />
* C standard library<br />
* Compiler-specific auxiliary functions<br />
It goes hand in hand with the startup code, which contains the first instructions to be executed when program execution starts.<br />
A C runtime library is required equally for [[Embedded Systems]], where the entire program is typically monolithic, so one single<br />
executable, as well as for larger systems such as Windows, Linux, MacOS, where the application runs on top of an Operating Systems<br />
and typically also in virtual memory space.<br />
==Content of C runtime library==<br />
===C standard library===<br />
The functions available in the C standard library are defined in the C-standard.<br />
Examples are:<br />
* memory and string functions, e.g. <code>strcpy</code>, <code>memcpy</code>, <code>memset</code>, <code>strcmp</code>. <br />
* formatted I/O functions, e.g. <code>printf</code>, <code>snprintf</code>, <code>scanf</code>, <code>sscanf</code>.<br />
* heap functions, e.g. <code>alloc</code>, <code>free</code>, <code>realloc</code>.<br />
<br />
===Compiler-specific auxiliary functions===<br />
The compiler specific auxiliary functions are highly dependent on compiler and architecture. They typically supply functionality<br />
required by the C standard, which cannot easily be implemented using single instructions on the target CPU.<br />
Typical things are arithmetic routines. On a CPU which does not offer a divide instruction, a divide routine must be provided<br />
in the library, so that the code required to perform this division does not need to be inserted inline where division is required,<br />
as the division code might be quite large.<br />
Even where a processor has built-in multiplication and division instructions, they are often not powerful enough.<br />
Modern Compilers implement 64-bit variables, and the 64-bit arithmetic cannot easily be performed by the processor in a single instruction.<br />
Auxiliary functions for 64-bit arithmetic, especially multiplication and division, are required. These functions are actually used by cryptography algorithms, and their performance is important to the system performance of these algorithms.<br />
<br />
==Implementation==<br />
A C runtime library can be implemented entirely in C (as high level language), but good implementations usually have various routines<br />
implemented in Assembly language (ASM) for performance reasons.<br />
Technically, other languages can be used (such as C++), but typically are not.<br />
<br />
==Performance==<br />
The performance of the application program does depend a lot on the C runtime library. Functions such as memcpy are used a lot by application programs,<br />
either directly (visible to the programmers, the application program directly calling memcpy) or even indirectly (by code generated by the compiler, for example to copy a structure).<br />
Other functions, such as arithmetic functions, may also have a significant effect on the performance.<br />
Different implementations can have vastly different performance, with a difference of factor 10 or more.<br />
A very simple memcpy implementation would copy bytes in a loop, one byte at a time, and be written in C, as below:<br />
<syntaxhighlight lang="c"><br />
<br />
void *memcpy( void *dest, const void *src, size_t NumBytes) {<br />
char *pDest;<br />
char *pSrc;<br />
<br />
pDest = (char*)dest; // Copy to byte size pointers to make the loop look prettier. Note that most compilers optimize things away anyhow<br />
pSrc = (char*)src;<br />
<br />
while (NumBytes > 0) {<br />
*pDest++ = *pSrc++;<br />
--NumBytes;<br />
}<br />
return dest; // Actually a waste of time to return the original pointer but it seems that is what the C-standard demands<br />
}<br />
</syntaxhighlight><br />
A good implementation is done in assembly language, will load and store as many words as possible words (so typically 32 bits on a 32-bit processor), and use special instructions where possible and available, such a multi-word read and write. The resulting difference in performance can be huge, and since a lot of applications use memcpy heavily, the difference in performance can be equally huge.<br />
<br />
==Size of the C runtime library==<br />
The size of the C runtime library is basically irrelevant. What is important is how much of it gets linked into the application.<br />
And this is where good and not so good implementations vary. A good implementation will add minimum space (for small applications,<br />
that can and should be no more than a few hundred bytes), where other implementations will not allow building applications below 20KB.<br />
<br />
==Granularity== <br />
Ideally, the C runtime library has very fine granularity. This means that only the functions actually referenced by the application are linked into<br />
the application.<br />
<br />
==Use of heap==<br />
Good runtime libraries do not require a heap. This is especially important in Embedded Systems, where a lot of times the application program does not use the<br />
heap. If the runtime library needs the heap, then the heap is required just for the run time library. This involves linking in the additional code for the heap management of the run time<br />
library, as well as setting aside some RAM to be used as heap.<br />
<br />
==Implementations of the C runtime library==<br />
There are lots of implementations available. Basically, every compiler comes with its own implementation, as it is not really fully usable without it.<br />
For [[GCC]], various free ones are available, such as glibc, newlib and newlib-nano.<br />
There is also a commercial version available, with much better performance and smaller memory footprint:<br />
https://wiki.segger.com/SEGGER_RunTime_Library<br />
For detailed information visit the [https://www.segger.com/products/development-tools/runtime-library/ SEGGER Runtime Library product page on segger.com].<br />
<br />
== Example standardised library ==<br />
<br />
Arm have documented the APIs required [https://developer.arm.com/docs/ihi0043/latest?_ga=2.224160987.1506853196.1533541889-405231439.1528186050] for a standard-conforming compiler to interoperate with other EABI-compliant compilers. This enables linking of libraries that are compiled with compiler A to be used by compiler and linker B '''if both A and B conform to the same EABI.'''<br />
<br />
There are many functions in the ABI, such as floating-point emulation for processors that lack a floating-point unit, or 64-bit multiplication and division for compilers that do not expand these operations inline.<br />
<br />
A language processor's runtime system must provide implementations of these functions even if the compiler never calls them. This enables, for instance, a library written for a Cortex-M3 device (that uses calls to the floating point helpers) to be linked with an application written for a Cortex-M4 device (with floating point unit and no calls to helpers). There will be a small penalty for using floating-point helpers in the Cortex-M3 code rather than floating-point instructions, but the code continues to work.</div>
Paul
https://wiki.segger.com/index.php?title=emRun&diff=6541
emRun
2019-11-04T08:57:31Z
<p>Paul: </p>
<hr />
<div>The SEGGER Runtime Library is the replacement from SEGGER for newlib, newlib-nano, and glibc used in most [[GCC]] toolchains. These libraries have significant disadvantages over professional runtime libraries for embedded systems. The SEGGER Runtime Library converts any [[GCC]]-based toolchain into a professional development choice. <br />
<br />
In many cases, the ROM-savings of the SEGGER Runtime Library enable the use of a smaller microcontroller with less on-chip memory. This can result in significant cost savings, especially for devices built in large quantities for the mass market.<br />
<br />
For detailed information visit the [https://www.segger.com/products/development-tools/runtime-library/ SEGGER Runtime Library product page on segger.com].<br />
<br />
== Who benefits from this product? ==<br />
<br />
There are three classes of customer for this product and three variants:<br />
<br />
* End users that wish to replace newlib, newlib-nano, or some other vendor-supplied library with the SEGGER Runtime Library in order to reduce code footprint. In this case, the library is already configured for the target architecture and delivered ready for customer integration into the IDE.<br />
* Silicon vendors that wish to license the SEGGER Runtime Library in order to offer it to their customers in place of newlib or newlib-nano as a competitive advantage. In this case, the silicon vendor receives a library configured for the processor architecture and ABI and integrates this into their IDE on behalf of all customers.<br />
* Processor IP vendors that wish to bring up a processor and associated toolset, for a proprietary architecture, where there is no pre-existing runtime library. In this case, the customer receives an architecture-neutral version of the runtime library, with supporting C functions, and integrates this into the compiler toolchain for their architecture.<br />
<br />
== What does the library contain? ==<br />
<br />
The SEGGER Runtime Library contains implementations of all Embedded C Subset functions required by the ISO standard. In addition it contains some functions that you will find in POSIX.1 and Linux that extend the C library with useful functionality.<br />
<br />
However, an implementation of the user-facing C library API is not all that is required to run a C program on a microcontroller. All C operations that do not directly map to machine instructions must be emulated in software. Therefore the SEGGER Runtime Library contains implementations of basic floating point operations, floating point conversions, and integer operations such as multiply, divide, and long shifts which use only fundamental integer data types, addition, subtraction, and shifting. <br />
<br />
== What parts of the library are machine specific? ==<br />
<br />
Although the SEGGER Runtime Library has C implementations of the required C API and runtime API, implementation of <code>setjmp()</code> and <code>longjmp()</code> are highly compiler, ABI, and machine specific. The SEGGER Runtime Library contains implementations for Arm and RISC-V using standard ABIs, but if you are bringing up the library on a different processor, or using a nonstandard ABI, you will need to implement both <code>setjmp()</code> and <code>longjmp()</code> yourself.<br />
<br />
== What ports exist for the library? ==<br />
<br />
The SEGGER Runtime Library is already widely deployed and is built into SEGGER's Embedded Studio for both Arm and RISC-V processor architectures.<br />
<br />
=== Arm port ===<br />
<br />
The Arm port confirms to [http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042f/IHI0042F_aapcs.pdf Arm's procedure calling standard for all supported architectures] and also the [http://infocenter.arm.com/help/topic/com.arm.doc.ihi0043d/IHI0043D_rtabi.pdf run-time ABI for the Arm Architecture]. It provides all required C functions and also the required runtime ABI functions with the correct ABI names. 32-bit and 64-bit integer operations (where required) are written in assembly language. Floating point emulation is written entirely in assembly language, for processors that have no hardware floating point, for both speed and compactness.<br />
<br />
=== RISC-V port ===<br />
<br />
The RISC-V port integrates with the GNU C compiler and provides runtime support using the standard GNU runtme support naming scheme (such as <code>__addsf3</code> which implements single-precision floating-point addition).<br />
<br />
=== Architecture-neutral port ===<br />
<br />
The architecture-neutral distribution contains functions written in C that allow toolset bootstrapping. The requirements made of the compiler are rudimentary, all that is required is basic integer and unsigned operations, up to 32 bits in width, to be provided. For machines without multiply or divide instructions, runtime support is emulated in plain C. IEEE single-precision and double-precision floating-point and 64-bit arithmetic is written in C. Once basic functionality is attained, the compiler and runtime system can be enhanced by replacing runtime support in C with runtime support in assembly language, one function at a time.<br />
<br />
== IDE specific content ==<br />
* [[How to use the SEGGER Runtime Library with NXP's MCUXpresso]]</div>
Paul
https://wiki.segger.com/index.php?title=emRun&diff=6540
emRun
2019-11-04T08:56:52Z
<p>Paul: </p>
<hr />
<div>The SEGGER Runtime Library is the replacement from SEGGER for newlib, newlib-nano, and glibc used in most [[GCC]] toolchains. These libraries have significant disadvantages over professional runtime libraries for embedded systems. The SEGGER RunTime Library converts any [[GCC]]-based toolchain into a professional development choice. <br />
<br />
In many cases, the ROM-savings of the SEGGER Runtime Library enable the use of a smaller microcontroller with less on-chip memory. This can result in significant cost savings, especially for devices built in large quantities for the mass market.<br />
<br />
For detailed information visit the [https://www.segger.com/products/development-tools/runtime-library/ SEGGER Runtime Library product page on segger.com].<br />
<br />
== Who benefits from this product? ==<br />
<br />
There are three classes of customer for this product and three variants:<br />
<br />
* End users that wish to replace newlib, newlib-nano, or some other vendor-supplied library with the SEGGER Runtime Library in order to reduce code footprint. In this case, the library is already configured for the target architecture and delivered ready for customer integration into the IDE.<br />
* Silicon vendors that wish to license the SEGGER Runtime Library in order to offer it to their customers in place of newlib or newlib-nano as a competitive advantage. In this case, the silicon vendor receives a library configured for the processor architecture and ABI and integrates this into their IDE on behalf of all customers.<br />
* Processor IP vendors that wish to bring up a processor and associated toolset, for a proprietary architecture, where there is no pre-existing runtime library. In this case, the customer receives an architecture-neutral version of the runtime library, with supporting C functions, and integrates this into the compiler toolchain for their architecture.<br />
<br />
== What does the library contain? ==<br />
<br />
The SEGGER Runtime Library contains implementations of all Embedded C Subset functions required by the ISO standard. In addition it contains some functions that you will find in POSIX.1 and Linux that extend the C library with useful functionality.<br />
<br />
However, an implementation of the user-facing C library API is not all that is required to run a C program on a microcontroller. All C operations that do not directly map to machine instructions must be emulated in software. Therefore the SEGGER Runtime Library contains implementations of basic floating point operations, floating point conversions, and integer operations such as multiply, divide, and long shifts which use only fundamental integer data types, addition, subtraction, and shifting. <br />
<br />
== What parts of the library are machine specific? ==<br />
<br />
Although the SEGGER Runtime Library has C implementations of the required C API and runtime API, implementation of <code>setjmp()</code> and <code>longjmp()</code> are highly compiler, ABI, and machine specific. The SEGGER Runtime Library contains implementations for Arm and RISC-V using standard ABIs, but if you are bringing up the library on a different processor, or using a nonstandard ABI, you will need to implement both <code>setjmp()</code> and <code>longjmp()</code> yourself.<br />
<br />
== What ports exist for the library? ==<br />
<br />
The SEGGER Runtime Library is already widely deployed and is built into SEGGER's Embedded Studio for both Arm and RISC-V processor architectures.<br />
<br />
=== Arm port ===<br />
<br />
The Arm port confirms to [http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042f/IHI0042F_aapcs.pdf Arm's procedure calling standard for all supported architectures] and also the [http://infocenter.arm.com/help/topic/com.arm.doc.ihi0043d/IHI0043D_rtabi.pdf run-time ABI for the Arm Architecture]. It provides all required C functions and also the required runtime ABI functions with the correct ABI names. 32-bit and 64-bit integer operations (where required) are written in assembly language. Floating point emulation is written entirely in assembly language, for processors that have no hardware floating point, for both speed and compactness.<br />
<br />
=== RISC-V port ===<br />
<br />
The RISC-V port integrates with the GNU C compiler and provides runtime support using the standard GNU runtme support naming scheme (such as <code>__addsf3</code> which implements single-precision floating-point addition).<br />
<br />
=== Architecture-neutral port ===<br />
<br />
The architecture-neutral distribution contains functions written in C that allow toolset bootstrapping. The requirements made of the compiler are rudimentary, all that is required is basic integer and unsigned operations, up to 32 bits in width, to be provided. For machines without multiply or divide instructions, runtime support is emulated in plain C. IEEE single-precision and double-precision floating-point and 64-bit arithmetic is written in C. Once basic functionality is attained, the compiler and runtime system can be enhanced by replacing runtime support in C with runtime support in assembly language, one function at a time.<br />
<br />
== IDE specific content ==<br />
* [[How to use the SEGGER Runtime Library with NXP's MCUXpresso]]</div>
Paul
https://wiki.segger.com/index.php?title=J-Run&diff=6136
J-Run
2019-08-14T16:54:09Z
<p>Paul: /* Usage */</p>
<hr />
<div>J-Run is a test tool to automatically run an application on a target device and receive its terminal output.<br />
<br />
https://blog.segger.com/j-run-automating-performance-tests<br />
<br />
<br />
<br />
== Usage ==<br />
JRun [options] elf-file<br />
<br />
{| class="wikitable"<br />
|-<br />
! Option<br />
! Alias<br />
! Default<br />
! Description<br />
|-<br />
| -d ''str''<br />
| --device ''str''<br />
| STM32F407IE<br />
| Set device name to "str".<br />
|-<br />
| --if ''SWD/JTAG''<br />
|<br />
| SWD<br />
| Select SWD or JTAG as target interface.<br />
|-<br />
| --speed ''n''<br />
|<br />
| 4000<br />
| Set interface speed to n kHz.<br />
|-<br />
| --rtt<br />
| <br />
| Auto<br />
| Force RTT enabled.<br />
|-<br />
| --nortt<br />
| <br />
| Auto<br />
| Force RTT disabled.<br />
|-<br />
| --sh<br />
| <br />
| Auto<br />
| Force semihosting enabled.<br />
|-<br />
| --nosh<br />
| <br />
| Auto<br />
| Force semihosting disabled.<br />
|-<br />
| -x ''str''<br />
| --exit ''str''<br />
| *STOP*<br />
| Set exit wildcard to "str".<br />
|-<br />
| --quit<br />
| <br />
| On<br />
| Automatically exit J-Run on application exit.<br />
|-<br />
| --wait<br />
| <br />
| Off<br />
| Wait for key press on application exit.<br />
|-<br />
| -2<br />
| --stderr<br />
| Off<br />
| Also send target output to stderr.<br />
|-<br />
| -s<br />
| --silent<br />
| Off<br />
| Work silently.<br />
|-<br />
| -v<br />
| --verbose<br />
| Off<br />
| Increase verbosity.<br />
|}<br />
<br />
== Example Output ==<br />
<br />
C:> jrun SEGGER_RTT_JRun_Demo.elf<br />
<br />
(c) 2018 SEGGER Microcontroller GmbH www.segger.com<br />
J-Run compiled Mar 19 2018 10:31:28<br />
<br />
Open application...OK<br />
Set target device to MK66FN2M0xxx18...OK<br />
Select SWD interface...OK<br />
Set interface speed to 4000 kHz...OK<br />
Reset target...OK<br />
Download 00000000-0000234F...OK<br />
Download 00002350-00002397...OK<br />
Set RTT control block at 0x20002090...OK<br />
Start target application...OK<br />
Start RTT...OK<br />
Read terminal data...<br />
<br />
SEGGER J-Run demo.<br />
<br />
Took 2582433 cycles<br />
<br />
C:> _<br />
<br />
C:> jrun --silent SEGGER_RTT_JRun_Demo.elf<br />
SEGGER J-Run demo.<br />
<br />
Took 2582433 cycles<br />
<br />
C:> _</div>
Paul
https://wiki.segger.com/index.php?title=J-Run&diff=6135
J-Run
2019-08-14T16:53:41Z
<p>Paul: /* Usage */</p>
<hr />
<div>J-Run is a test tool to automatically run an application on a target device and receive its terminal output.<br />
<br />
https://blog.segger.com/j-run-automating-performance-tests<br />
<br />
<br />
<br />
== Usage ==<br />
JRun [options] elf-file<br />
<br />
{| class="wikitable"<br />
|-<br />
! Option<br />
! Alias<br />
! Default<br />
! Description<br />
|-<br />
| -d ''str''<br />
| --device ''str''<br />
| STM32F407IE<br />
| Set device name to "str".<br />
|-<br />
| --if ''SWD/JTAG''<br />
|<br />
| SWD<br />
| Select SWD or JTAG as target interface.<br />
|-<br />
| --speed ''n''<br />
|<br />
| 4000<br />
| Set interface speed to n kHz.<br />
|-<br />
| --rtt<br />
| <br />
| Auto<br />
| Force RTT enabled.<br />
|-<br />
| --nortt<br />
| <br />
| Auto<br />
| Force RTT disabled.<br />
|-<br />
| --sh<br />
| <br />
| Auto<br />
| Force semihosting enabled.<br />
|-<br />
| --nosh<br />
| <br />
| Auto<br />
| Force semihosting disabled.<br />
|-<br />
| -x ''str''<br />
| --exit ''str''<br />
| *STOP*<br />
| Set exit wildcard to "str".<br />
|-<br />
| --quit<br />
| <br />
| On<br />
| Automatically exit J-Run on application exit.<br />
|-<br />
| --wait<br />
| <br />
| Off<br />
| Wait for key press on application exit.<br />
|-<br />
| -2<br />
| --stderr<br />
| Off<br />
| Also send target output to stderr.<br />
|-<br />
| -s<br />
| --silent<br />
| Off<br />
| Work silently.<br />
|-<br />
| -v<br />
| --verbose<br />
| Off<br />
| Increase verbosity.<br />
|<br />
|}<br />
<br />
== Example Output ==<br />
<br />
C:> jrun SEGGER_RTT_JRun_Demo.elf<br />
<br />
(c) 2018 SEGGER Microcontroller GmbH www.segger.com<br />
J-Run compiled Mar 19 2018 10:31:28<br />
<br />
Open application...OK<br />
Set target device to MK66FN2M0xxx18...OK<br />
Select SWD interface...OK<br />
Set interface speed to 4000 kHz...OK<br />
Reset target...OK<br />
Download 00000000-0000234F...OK<br />
Download 00002350-00002397...OK<br />
Set RTT control block at 0x20002090...OK<br />
Start target application...OK<br />
Start RTT...OK<br />
Read terminal data...<br />
<br />
SEGGER J-Run demo.<br />
<br />
Took 2582433 cycles<br />
<br />
C:> _<br />
<br />
C:> jrun --silent SEGGER_RTT_JRun_Demo.elf<br />
SEGGER J-Run demo.<br />
<br />
Took 2582433 cycles<br />
<br />
C:> _</div>
Paul
https://wiki.segger.com/index.php?title=MAC_STM32FH753&diff=6027
MAC STM32FH753
2019-08-06T11:54:12Z
<p>Paul: Created page with " <nowiki>Copyright (c) 2014-2019 SEGGER Microcontroller GmbH www.segger.com MAC Benchmark compiled Aug 6 2019 13:50:59 Compiler: gcc 8.2.1 System: Processor speed..."</p>
<hr />
<div> <nowiki>Copyright (c) 2014-2019 SEGGER Microcontroller GmbH www.segger.com<br />
MAC Benchmark compiled Aug 6 2019 13:50:59<br />
<br />
Compiler: gcc 8.2.1<br />
System: Processor speed = 400.000 MHz<br />
Config: CRYPTO_VERSION = 23400 [2.34]<br />
Config: CRYPTO_CONFIG_MD5_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_MD5_HW_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_RIPEMD160_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_SHA1_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_SHA1_HW_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_SHA256_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_SHA256_HW_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_SHA512_OPTIMIZE = 2<br />
Config: CRYPTO_CONFIG_AES_OPTIMIZE = 7<br />
Config: CRYPTO_CONFIG_AES_HW_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_DES_OPTIMIZE = 5<br />
Config: CRYPTO_CONFIG_ARIA_OPTIMIZE = 1<br />
Config: CRYPTO_CONFIG_SEED_OPTIMIZE = 3<br />
Config: CRYPTO_CONFIG_CAMELLIA_OPTIMIZE = 3<br />
<br />
+-------------------+----------+-----------+<br />
| Algorithm | Key size | MAC |<br />
| | bits | MB/s |<br />
+-------------------+----------+-----------+<br />
| CMAC-AES | 128 | 10.29 |<br />
| CMAC-AES | 192 | 10.29 |<br />
| CMAC-AES | 256 | 10.29 |<br />
| CMAC-TDES | 64 | 7.61 |<br />
| CMAC-TDES | 128 | 6.48 |<br />
| CMAC-TDES | 192 | 6.48 |<br />
| CMAC-SEED | 128 | 7.04 |<br />
| CMAC-ARIA | 128 | 1.90 |<br />
| CMAC-ARIA | 192 | 1.63 |<br />
| CMAC-ARIA | 256 | 1.43 |<br />
| CMAC-Camellia | 128 | 10.04 |<br />
| CMAC-Camellia | 192 | 7.99 |<br />
| CMAC-Camellia | 256 | 7.99 |<br />
+-------------------+----------+-----------+<br />
| GMAC-AES | 128 | 0.48 |<br />
| GMAC-AES | 192 | 0.58 |<br />
| GMAC-AES | 256 | 0.51 |<br />
| GMAC-SEED | 128 | 0.51 |<br />
| GMAC-ARIA | 128 | 0.51 |<br />
| GMAC-ARIA | 192 | 0.51 |<br />
| GMAC-ARIA | 256 | 0.53 |<br />
| GMAC-Camellia | 128 | 0.52 |<br />
| GMAC-Camellia | 192 | 0.51 |<br />
| GMAC-Camellia | 256 | 0.54 |<br />
+-------------------+----------+-----------+<br />
| HMAC-MD5 | 128 | 111.62 |<br />
| HMAC-RIPEMD160 | 160 | 24.25 |<br />
| HMAC-SHA-1 | 160 | 97.34 |<br />
| HMAC-SHA-224 | 224 | 111.62 |<br />
| HMAC-SHA-256 | 256 | 111.62 |<br />
| HMAC-SHA-384 | 384 | 5.27 |<br />
| HMAC-SHA-512 | 512 | 5.27 |<br />
| HMAC-SHA-512/224 | 224 | 5.27 |<br />
| HMAC-SHA-512/256 | 256 | 5.27 |<br />
+-------------------+----------+-----------+<br />
| Poly1305-AES | 256 | 26.93 |<br />
| Poly1305-SEED | 256 | 26.93 |<br />
| Poly1305-ARIA | 256 | 26.93 |<br />
| Poly1305-Camellia | 256 | 26.93 |<br />
+-------------------+----------+-----------+<br />
<br />
Benchmark complete<br />
<br />
STOP.</nowiki></div>
Paul