/*********************************************************************** * SEGGER Microcontroller GmbH * * The Embedded Experts * ************************************************************************ * * * (c) SEGGER Microcontroller GmbH * * All rights reserved * * www.segger.com * * * ************************************************************************ * * ************************************************************************ * * * * * Licensing terms * * * * Redistribution and use in source and binary forms, with or without * * modification, are permitted provided that the following conditions * * are met: * * * * 1. Redistributions of source code must retain the above copyright * * notice, this list of conditions and the following disclaimer. * * * * 2. Redistributions in binary form must reproduce the above * * copyright notice, this list of conditions and the following * * disclaimer in the documentation and/or other materials provided * * with the distribution. * * * * * * THIS SOFTWARE IS PROVIDED BY COPYRIGHT HOLDER "AS IS" AND ANY * * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE * * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, * * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH. * * DAMAGE. * * * ************************************************************************ -------------------------- END-OF-HEADER ----------------------------- File : NXP_iMX6DQ_Core3.JLinkScript Purpose : J-Link script file to debug core 1 on the NXP i.MX6DQ Literature: [1] J-Link User Guide Notes: (1) ... Additional information: For more information about public functions that can be implemented in order to customize J-Link actions, please refer to [1] */ /********************************************************************* * * ResetTarget */ void ResetTarget(void) { // // In case cores 1-3 are reset, we do nothing. // As we would lose connection to these cores, // when resetting the device because reset disables cores 1-3 and only leaves core0 alive // } /********************************************************************* * * ConfigTargetSettings() * * Function description * Called before InitTarget(). Maninly used to set some global DLL variables to customize the normal connect procedure. * For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...) * that cannot be automatically detected by J-Link due to erroneous ROM tables etc. * May also be used to specify the device name in case debugger does not pass it to the DLL. * * Notes * (1) May not, under absolutely NO circumstances, call any API functions that perform target communication. * (2) Should only set some global DLL variables */ void ConfigTargetSettings(void) { JLINK_CPU = CORTEX_A9; // For a complete list of known CPU constants, please refer to UM08001 (J-Link User Guide) // // Configure base address of debug registers so J-Link knows to which core it shall connect // On the i.MX6DQ all cores are accessible via a single APB-AP but their debug registers are located at different addresses // Addresses taken from DAP memory map in TRM of i.MX6D // 0x02150000 CPU0 Debug i/f // 0x02152000 CPU1 Debug i/f // 0x02154000 CPU2 Debug i/f // 0x02156000 CPU3 Debug i/f // // Highest bit of address can be set to 1 without affecting the functionality of J-Link, as DAP memory is aliased there // CORESIGHT_CoreBaseAddr = 0x02156000; JLINK_CORESIGHT_AddAP(0, CORESIGHT_AHB_AP); // AHB-AP to System Bus JLINK_CORESIGHT_AddAP(1, CORESIGHT_APB_AP); // APB-AP to access Cortex-A9 cores JLINK_CORESIGHT_IndexAPBAPToUse = 1; // Cortex-A/R: AP-Index of APB-AP to use for communication with core // JLINK_CORESIGHT_IndexAHBAPToUse = 0; // Cortex-M: AP-Index of AHB-AP to use for communication with core. Cortex-A/R: AP-Index of AHB-AP that can be used for SEGGER RTT }