Difference between revisions of "CMSemicon BAT32G133"

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(Internal Data Flash)
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| BAT32G157xKxxxx || 0x08500200 || 2.5Kb || YES
 
| BAT32G157xKxxxx || 0x08500200 || 2.5Kb || YES
 
|}
 
|}
 
   
 
===Option Bytes ===
 
===Option Bytes ===

Revision as of 13:33, 14 November 2022

The BAT32G1xxGx series (BAT32 family) are 32-bit general-purpose microcontrollers based on the Arm® Cortex®-M0 processor.

Internal ECC RAM

Device StartAddr Size
BAT32G133xAxxxx 0x20000000 4Kb
BAT32G133xCxxxx 0x20000000 4Kb
BAT32G157xHxxxx 0x20000000 32Kb
BAT32G157xKxxxx 0x20000000 32Kb
  *** Additional information ***

In order to prevent errors when reading first time, the DLL intialises the first 4Kb of RAM starting at 0x2000_0000.
Due to this attaching to a running system is not possible.

Supported Flash Banks

Internal Flash

Device StartAddr Size J-Link Support
BAT32G133xAxxxx 0x00000000 16Kb YES
BAT32G133xCxxxx 0x00000000 32Kb YES
BAT32G157xHxxxx 0x08000000 128Kb YES
BAT32G157xKxxxx 0x08000000 256Kb YES

Internal Data Flash

Device StartAddr Size J-Link Support
BAT32G133xAxxxx 0x00500000 1.5Kb YES
BAT32G133xCxxxx 0x00500000 1.5Kb YES
BAT32G157xHxxxx 0x08500200 2.5Kb YES
BAT32G157xKxxxx 0x08500200 2.5Kb YES

Option Bytes

Within the Flash-Area (Offset:0x0c) and DataFlash-Area (Offset:0x4)

Please refer to the manual for detailed description

Offset Register
0xc0 WDT Control BYTE
0xc1 LVD Control BYTE (C1H)
0xc2 HOCO Control BYTE (FRQSEL)
0xc3 Flash Protect Control BYTE
0xc4 Boot Area Control BYTE
0xc5 QSPI flash protect option BYTE
0xc6 QSPI flash protect option BYTE0
0xc7 QSPI flash protect option BYTE1

AS THE OPTION BYTES ARE WITHIN THE NORMAL FLASH AREA PLEASE ENSURE NOT TO OVERWRITE WITH PROGRAM CODE
ONE POSSIBLE SOLUTION IS WITHIN THE EXAMPLES

Reset

The device uses normal reset, no special handling necessary.

Minimum requirements

  • J-Link software V7.__b or later

Evaluation Boards

Example Application