Geehy APM32F4xx

From SEGGER Wiki
Jump to: navigation, search

The Geehy APM32F4xx are Cortex-M4 based MCUs. Following information also applies for devices of the Geehy APM32A4xx family.

Internal Flash

Supported Regions

The internal flash is divided into 4 different regions:

  • Main storage area starting at 0x08000000 with up to 1MB
  • Reserved bootloader area starting at 0x1FFFF000 with up to 30KB
  • OTP area starting at 0x1FFF7800 with 528 bytes
  • Option byte area starting at 0x1FFFC000 with 16 bytes

For now, the J-Link support the main storage and option byte area.

Option Byte Programming

The APM32F4 series devices provide some option bytes which allow some "permanent" configuration as well as readout protection for the device. The option bytes become effective after a reset, or, if the read protection is set while a debugger is still connected through JTAG/SWD, become effective after a power-on-reset. The sequence, to program the option bytes consists of multiple read / write accesses to special function registers of the APM32F4 MCU.

Direct programming of the option byte area is not supported by the device. Instead a special option bytes control register is used. The correct handling and remapping of the option byte area to this register is handled automatically by the J-Link.

The following table describes the structure of the option byte sector:

Address [15:8] [7] [6] [5] [4] [3:2] [1:0]
0x1FFFC000 RPROT RSTSTDB RSTSTOP WDTSEL --- BORLVL ---
Address [15:12] [11:0]
0x1FFFC008 --- NWPROT
Note:

All other bytes of the option byte area not currently documented. Similar to other Geehy devices they seem to be used for option byte verification. This verification is done using complementary and duplicate bytes of the actual option bytes.

Any non-documented option bytes are automatically handled by the J-Link.
Note:
Writing a value of 0xFF inside RPROT will read-protect the APM32F4. In order to keep the device unprotected you have to write the key value 0xAA into RPROT.

Reset

No device specific reset is necessary. The normal Cortex-M reset is performed.

See here for more information: https://wiki.segger.com/J-Link_Reset_Strategies#Type_0:_Normal

Evaluation Boards

Example Application