Difference between revisions of "GigaDevice GD32A5"
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The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm® |
The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm® |
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Cortex®-M33 processor.<br> |
Cortex®-M33 processor.<br> |
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| − | ==Internal RAM== |
+ | ==Internal ECC RAM== |
| + | {| class="seggertable" |
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| − | 24/36/48 Kb ECC |
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| + | |- |
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| − | ==Internal Flash== |
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| + | ! Device || StartAddr !! Size |
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| − | 128/256/384 Kb |
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| + | |- |
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| − | ==QSPI Flash== |
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| + | | GD32A503xB || 0x20000000 || 24Kb |
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| − | n/a |
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| + | |- |
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| − | ===Supported Regions=== |
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| + | | GD32A503xC || 0x20000000 || 32Kb |
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| − | Internal Flash 0x0800 0000 - 0x0801 FFFF <br> |
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| + | |- |
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| − | Internal Flash 0x0800 0002 - 0x0803 FFFF <br> |
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| + | | GD32A503xD || 0x20000000 || 48Kb |
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| − | Internal Flash 0x0800 0004 - 0x0805 FFFF <br> |
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| + | |} |
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| − | ==Reset== |
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| + | |||
| − | The device uses normal reset, no special handling necessary. |
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| + | *** Additional information *** |
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| − | ===ECC RAM=== |
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In order to prevent errors when reading first time, the DLL intialises the first 24Kb of RAM |
In order to prevent errors when reading first time, the DLL intialises the first 24Kb of RAM |
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starting at 0x2000 0000. |
starting at 0x2000 0000. |
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| + | |||
| + | ==Supported Flash Banks== |
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| + | ===Internal Flash=== |
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| + | {| class="seggertable" |
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| + | |- |
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| + | ! Device || StartAddr !! Size || J-Link Support |
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| + | |- |
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| + | | GD32A503xB || 0x08000000 || 128Kb || YES |
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| + | |- |
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| + | | GD32A503xC || 0x08000000 || 256Kb || YES |
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| + | |- |
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| + | | GD32A503xD || 0x08000000 || 384Kb || YES |
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| + | |} |
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| + | |||
| + | |||
| + | ===Option Byte === |
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| + | {| class="seggertable" |
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| + | |- |
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| + | ! Device || StartAddr !! Size || J-Link Support |
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| + | |- |
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| + | | GD32A503xB || 0x1FFFF800 || 24 Byte || YES |
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| + | |- |
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| + | | GD32A503xC || 0x1FFFF800 || 24 Byte|| YES |
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| + | |- |
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| + | | GD32A503xD || 0x1FFFF800 || 24 Byte|| YES |
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| + | |} |
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| + | ==Reset== |
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| + | The device uses normal reset, no special handling necessary. |
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| + | |||
| + | |||
==Evaluation Boards== |
==Evaluation Boards== |
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| − | * |
+ | *GigaDevice GD32A503-EVAL evaluation board: https://wiki.segger.com/GigaDevice_GD32A503-EVAL |
==Example Application== |
==Example Application== |
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| − | * |
+ | *GigaDevice GD32A503-EVAL evaluation board: https://wiki.segger.com/GigaDevice_GD32A503-EVAL#Example_Project |
Revision as of 10:35, 9 November 2022
Contents
The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm®
Cortex®-M33 processor.
Internal ECC RAM
| Device | StartAddr | Size |
|---|---|---|
| GD32A503xB | 0x20000000 | 24Kb |
| GD32A503xC | 0x20000000 | 32Kb |
| GD32A503xD | 0x20000000 | 48Kb |
*** Additional information ***
In order to prevent errors when reading first time, the DLL intialises the first 24Kb of RAM starting at 0x2000 0000.
Supported Flash Banks
Internal Flash
| Device | StartAddr | Size | J-Link Support |
|---|---|---|---|
| GD32A503xB | 0x08000000 | 128Kb | YES |
| GD32A503xC | 0x08000000 | 256Kb | YES |
| GD32A503xD | 0x08000000 | 384Kb | YES |
Option Byte
| Device | StartAddr | Size | J-Link Support |
|---|---|---|---|
| GD32A503xB | 0x1FFFF800 | 24 Byte | YES |
| GD32A503xC | 0x1FFFF800 | 24 Byte | YES |
| GD32A503xD | 0x1FFFF800 | 24 Byte | YES |
Reset
The device uses normal reset, no special handling necessary.
Evaluation Boards
- GigaDevice GD32A503-EVAL evaluation board: https://wiki.segger.com/GigaDevice_GD32A503-EVAL
Example Application
- GigaDevice GD32A503-EVAL evaluation board: https://wiki.segger.com/GigaDevice_GD32A503-EVAL#Example_Project
