Difference between revisions of "Hilscher netX90"

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The netX90 is the newest addition to Hilscher’s SoC family that provides a superior solution with an unmatched protocol flexibility for a variety of industrial slave or device applications in the process and factory automation.
 
The netX90 is the newest addition to Hilscher’s SoC family that provides a superior solution with an unmatched protocol flexibility for a variety of industrial slave or device applications in the process and factory automation.
   
==Debug Support==
+
== Debug Support ==
 
The J-Link support for the Hilscher netX90 includes both Cortex-M4 cores, COM core and APP core.
 
The J-Link support for the Hilscher netX90 includes both Cortex-M4 cores, COM core and APP core.
 
{{Note|1=To be able to connect to the APP core it first needs to be enabled via an application running in the COM core. Initialization of the APP core is user responsibility.
 
{{Note|1=To be able to connect to the APP core it first needs to be enabled via an application running in the COM core. Initialization of the APP core is user responsibility.
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}}
 
}}
   
==On-Chip Memory Regions==
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== On-Chip Memory Regions ==
The internal flash is divided into 3 different regions for the COM core:
+
The internal flash is divided into 2 different regions for the COM core and 1 shared region for APP and COM core.
  +
All flash banks are supported by J-Link.
 
{| class="wikitable"
+
{| class="seggertable"
 
|-
 
|-
! Instance Name !! Size || Memory range
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! Instance Name !! Core access !! Size !! Memory range
 
|-
 
|-
| Bank 0 || 512 KB || 0x00100000 - 0x0017FFFF
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| Bank 0 || COM || 512 KB || 0x00100000 - 0x0017FFFF
 
|-
 
|-
| Bank 1 || 512 KB || 0x00180000 - 0x001FFFFF
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| Bank 1 || COM || 512 KB || 0x00180000 - 0x001FFFFF
 
|-
 
|-
| Bank 2 || 512 KB || 0x00200000 - 0x0027FFFF
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| Bank 2 || COM & APP || 512 KB || 0x00200000 - 0x0027FFFF
 
|}
 
|}
   
  +
== Reset ==
The App core has only access to internal flash bank 2:
 
  +
=== Com core ===
 
  +
The following two reset types are supported:
{| class="wikitable"
 
  +
* [[J-Link_Reset_Strategies#Type_0:_Normal | Reset type 0: Normal]] + halt after bootloader
|-
 
  +
* [[J-Link_Reset_Strategies#Type_2:_ResetPin| Reset type 2: Reset pin]] + halt after bootloader
! Instance Name !! Size || Memory range
 
  +
In both cases, the rest will make sure that the device is halted after bootloader execution is completed and
|-
 
  +
before the user application is started.
| Bank 2 || 512 KB || 0x00200000 - 0x0027FFFF
 
  +
=== APP core ===
|}
 
  +
For the app core, no device specific reset is implemented. Thus the default reset is used:
  +
[[J-Link_Reset_Strategies#Type_0:_Normal]]
   
==Trace Support==
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== Trace Support ==
See [[Tracing on Hilscher netX90]]
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See: [[Tracing on Hilscher netX90]]
   
==Example Application==
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== Example Projects ==
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash.<br><br>
+
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash.
  +
===Setup===
'''SETUP'''
 
 
*J-Link software: V7.55d
 
*J-Link software: V7.55d
 
*Embedded Studio: V5.50d
 
*Embedded Studio: V5.50d
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*Link: [[File:Hilscher_NetX90_ComCore_TestProject_ES_V550d.zip]]
 
*Link: [[File:Hilscher_NetX90_ComCore_TestProject_ES_V550d.zip]]
 
*Link: [[File:Hilscher_NetX90_AppCore_TestProject_ES_V550d.zip]]
 
*Link: [[File:Hilscher_NetX90_AppCore_TestProject_ES_V550d.zip]]
'''Note''': The App core example works only, when the App core has been enabled by the COM core.
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{{Note|1=The App core example works only, when the App core has been enabled by the COM core.}}

Latest revision as of 12:44, 23 September 2022

The netX90 is the newest addition to Hilscher’s SoC family that provides a superior solution with an unmatched protocol flexibility for a variety of industrial slave or device applications in the process and factory automation.

Debug Support

The J-Link support for the Hilscher netX90 includes both Cortex-M4 cores, COM core and APP core.

Note:

To be able to connect to the APP core it first needs to be enabled via an application running in the COM core. Initialization of the APP core is user responsibility.

For information about how this can be achieved we recommend to contact Hilscher support or use their netX90 documentation for reference.

On-Chip Memory Regions

The internal flash is divided into 2 different regions for the COM core and 1 shared region for APP and COM core. All flash banks are supported by J-Link.

Instance Name Core access Size Memory range
Bank 0 COM 512 KB 0x00100000 - 0x0017FFFF
Bank 1 COM 512 KB 0x00180000 - 0x001FFFFF
Bank 2 COM & APP 512 KB 0x00200000 - 0x0027FFFF

Reset

Com core

The following two reset types are supported:

In both cases, the rest will make sure that the device is halted after bootloader execution is completed and before the user application is started.

APP core

For the app core, no device specific reset is implemented. Thus the default reset is used: J-Link_Reset_Strategies#Type_0:_Normal

Trace Support

See: Tracing on Hilscher netX90

Example Projects

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash.

Setup

Note:
The App core example works only, when the App core has been enabled by the COM core.