Difference between revisions of "Hilscher netX90"

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(Example Application)
(On-Chip Memory Regions)
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! Instance Name !! Size (kilo bytes) || Memory region
 
! Instance Name !! Size (kilo bytes) || Memory region
 
|-
 
|-
| Bank 0 || 512|| 0x00100000 - 0x00180000
+
| Bank 0 || 512|| 0x00100000 - 0x0017FFFF
 
|-
 
|-
| Bank 1 || 512|| 0x00180000 - 0x20000000
+
| Bank 1 || 512|| 0x00180000 - 0x001FFFFF
 
|-
 
|-
| Bank 2 || 512|| 0x00200000 - 0x00280000
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| Bank 2 || 512|| 0x00200000 - 0x0027FFFF
 
|}
 
|}
   
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! Instance Name !! Size (kilo bytes) || Memory region
 
! Instance Name !! Size (kilo bytes) || Memory region
 
|-
 
|-
| Bank 2 || 512|| 0x00200000 - 0x00280000
+
| Bank 2 || 512|| 0x00200000 - 0x0027FFFF
 
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Revision as of 14:49, 11 February 2022

The netX90 is the newest addition to Hilscher’s SoC family that provides a superior solution with an unmatched protocol flexibility for a variety of industrial slave or device applications in the process and factory automation

Debug Support

The J-Link support for the Hilscher netX90 includes both Cortex-M4 cores, Net-Core and App-Core

On-Chip Memory Regions

The internal flash is divided into 3 different regions for the Net-Core:

Instance Name Size (kilo bytes) Memory region
Bank 0 512 0x00100000 - 0x0017FFFF
Bank 1 512 0x00180000 - 0x001FFFFF
Bank 2 512 0x00200000 - 0x0027FFFF

The App-Core has only access to internal flash bank 2:

Instance Name Size (kilo bytes) Memory region
Bank 2 512 0x00200000 - 0x0027FFFF

Trace Support

Example Application

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash. SETUP

Note: The App core example works only, when the App Core has been enabled by the Com core.