Difference between revisions of "Hilscher netX90"

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(Debug Support)
Line 10: Line 10:
   
 
==On-Chip Memory Regions==
 
==On-Chip Memory Regions==
The internal flash is divided into 3 different regions for the Net-Core:
+
The internal flash is divided into 3 different regions for the COM core:
   
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
! Instance Name !! Size (kilo bytes) || Memory region
+
! Instance Name !! Size || Memory range
 
|-
 
|-
| Bank 0 || 512|| 0x00100000 - 0x0017FFFF
+
| Bank 0 || 512 KB || 0x00100000 - 0x0017FFFF
 
|-
 
|-
| Bank 1 || 512|| 0x00180000 - 0x001FFFFF
+
| Bank 1 || 512 KB || 0x00180000 - 0x001FFFFF
 
|-
 
|-
| Bank 2 || 512|| 0x00200000 - 0x0027FFFF
+
| Bank 2 || 512 KB || 0x00200000 - 0x0027FFFF
 
|}
 
|}
   
The App-Core has only access to internal flash bank 2:
+
The App core has only access to internal flash bank 2:
   
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
! Instance Name !! Size (kilo bytes) || Memory region
+
! Instance Name !! Size || Memory range
 
|-
 
|-
| Bank 2 || 512|| 0x00200000 - 0x0027FFFF
+
| Bank 2 || 512 KB || 0x00200000 - 0x0027FFFF
 
|}
 
|}
   
 
==Trace Support==
 
==Trace Support==
  +
See: [[Tracing on Hilscher netX90]]
*Hilscher netX90 tracing: https://wiki.segger.com/Tracing_on_Hilscher_netX90
 
  +
 
==Example Application==
 
==Example Application==
 
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash.<br><br>
 
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash.<br><br>

Revision as of 12:40, 20 September 2022

The netX90 is the newest addition to Hilscher’s SoC family that provides a superior solution with an unmatched protocol flexibility for a variety of industrial slave or device applications in the process and factory automation.

Debug Support

The J-Link support for the Hilscher netX90 includes both Cortex-M4 cores, COM core and APP Core.

Note:

To be able to connect to the APP core it first needs to be enabled via an application running in the COM core.Initialization of the APP core is user responsibility.

For information about how this can be achieved we recommend to contact Hilscher support or use their netX90 documentation for reference.

On-Chip Memory Regions

The internal flash is divided into 3 different regions for the COM core:

Instance Name Size Memory range
Bank 0 512 KB 0x00100000 - 0x0017FFFF
Bank 1 512 KB 0x00180000 - 0x001FFFFF
Bank 2 512 KB 0x00200000 - 0x0027FFFF

The App core has only access to internal flash bank 2:

Instance Name Size Memory range
Bank 2 512 KB 0x00200000 - 0x0027FFFF

Trace Support

See: Tracing on Hilscher netX90

Example Application

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash.

SETUP

Note: The App core example works only, when the App Core has been enabled by the Com core.