i.MX6SoloX
Multi-core support for iMX6SX (SoloX)
J-Link script files are necessary to connect to the A9 and M4 core of the iMX6SX (SoloX) MCU.
A9 core: iMX6SoloX_Connect_CortexA9.JLinkScript
M4 core: iMX6SoloX_Connect_CortexM4.JLinkScript
How to use script files: Please refer to J-Link User Guide (UM08001), chapter 5.10 "J-Link script files"
Startup procedure is:
1) Start debug session that connects to A9 and let it run the application to the point that enables the M4 2) Start debug session that connects to M4 [...] x) Close debug session that connects to M4 x + 1) Close debug session that connects to A9
Important!
On the SoloX the M4 cannot be independently debugged without having something running on the A9 that enables the M4. Since Freescale removed some features from the i.MX6 to the SoloX, it is no longer possible to easily enable the M4 from the debug interface and so being able to debug it completely independent from the A9.
iMX6SX (Q)SPI support
The NXP iMX6SX device series comes with a QUADSPI controller which allows memory mapped read accesses to any (Q)SPI flash, connected to the Quad-SPI interface of the MCU. This allows the J-Link DLL to support flash programming through the Quad-SPI interface. Unfortunately, there is no generic way how to implement flash programming because the used pins to connect the SPI flash is not defined but different pins can be used for the same QUADSPI alternate function and therefore, for each configuration, a slightly different RAMCode (different pin initialization / flash size) is required. We have developed a flash algorithm, which allows to program any common (Q)SPI flash, connected to the Quad-SPI interface of the NXP iMX6SX device. The flash algorithm is based on the Open Flashloader concept so it can easily exchanged if a pin configuration, different from the one used in the example flash algorithm, is required. In such cases, please get in touch with SEGGER directly (support@segger.com).
Example Implementation 1 (SABRE evaluation board)
As described above, the reference flash algorithm is based on the Open Flashloader and therefore needs to be added manually using a JLinkDevices.xml file. An example JLinkDevices.xml entry as well as the used pinout in the example flash algorithm is given below. This example assumes a Micron N25Q256A1 (32MB flash) connected to the Quad-SPI interface of the iMX6SX. For further information regarding the Open Flashloader and how to use the JLinkDevices.xml file, please refer to the J-Link User Manual (UM08001), chapter 10 Open Flash Loader.
Quad-SPI Interface Pins
The following QSPI interface is used on the iMX6SX SABRE evaluation board to interface the (Q)SPI flash.
| Alternate function | Port / Pin |
|---|---|
| QSPI2A_SS0_B | IOMUXC_SW_MUX_CTL_PAD_NAND_ALE |
| QSPI2A_DATA2 | IOMUXC_SW_MUX_CTL_PAD_NAND_CE0_B |
| QSPI2A_DATA3 | IOMUXC_SW_MUX_CTL_PAD_NAND_CE1_B |
| QSPI2A_SCLK | IOMUXC_SW_MUX_CTL_PAD_NAND_CLE |
| QSPI2A_DATA1 | IOMUXC_SW_MUX_CTL_PAD_NAND_READY_B |
| QSPI2A_DATA0 | IOMUXC_SW_MUX_CTL_PAD_NAND_WP_B |
JLinkDevices.xml
<Database>
<Device>
<ChipInfo Vendor="NXP"
JLinkScriptFile="Devices\NXP\iMX6SoloX_Connect_CortexA9.JLinkScript"
Name="MCIMX6X1_A9"
WorkRAMAddr="0x00900000"
WorkRAMSize="0x00020000"
Core="JLINK_CORE_CORTEX_A9"/>
<FlashBankInfo Name="QSPI Flash"
BaseAddr="0x70000000"
MaxSize="0x02000000"
Loader="NXP_iMX6SX_SABRE_Board_QSPI.elf"
LoaderType="FLASH_ALGO_TYPE_OPEN" />
</Device>
</Database>
Flash algorithm (*.elf)
This file contains the program routines used by the J-Link DLL during flash programming.
IAR example project
The example project contains a simple counter loop which is linked into the (Q)SPI flash memory region @ address 0x70000000. The project includes the JLinkDevices.xml file as well as the NXP_iMX6SX_SABRE_Board_QSPI.elf. It runs out-of-the-box. Please note, that IAR EWARM must at least use the J-Link DLL version V6.10m.
Example Implementation 2
As described above, the reference flash algorithm is based on the Open Flashloader and therefore needs to be added manually using a JLinkDevices.xml file. An example JLinkDevices.xml entry as well as the used pinout in the example flash algorithm is given below. This example assumes a Spansion S25FL256S (32MB flash) connected to the Quad-SPI interface of the iMX6SX. For further information regarding the Open Flashloader and how to use the JLinkDevices.xml file, please refer to the J-Link User Manual (UM08001), chapter 10 Open Flash Loader.
Quad-SPI Interface Pins
The following QSPI interface is used to interface the (Q)SPI flash.
| Alternate function | Port / Pin |
|---|---|
| QSPI1A_DATA0 | IOMUXC_SW_MUX_CTL_PAD_QSPI1A_DATA0 |
| QSPI2A_DATA1 | IOMUXC_SW_MUX_CTL_PAD_QSPI1A_DATA1 |
| QSPI2A_DATA2 | IOMUXC_SW_MUX_CTL_PAD_QSPI1A_DATA2 |
| QSPI2A_DATA3 | IOMUXC_SW_MUX_CTL_PAD_QSPI1A_DATA3 |
| QSPI1A_SS0_B | IOMUXC_SW_MUX_CTL_PAD_QSPI1A_SS0_B |
| QSPI1A_SCLK | IOMUXC_SW_MUX_CTL_PAD_QSPI1A_SCLK |
JLinkDevices.xml
(see Example Implementation 2 above)
Flash algorithm (*.elf)
This file contains the program routines used by the J-Link DLL during flash programming.
