i.MX7Dual

From SEGGER Wiki
Revision as of 12:39, 2 May 2018 by Erik (talk | contribs) (QSPI flash programming support)
Jump to: navigation, search

QSPI flash programming support

QSPI flash programming support is included since software version V6.32. It allows to program any common SPI flash connected to the QSPI controller. Programming is supported out-of-the-box thus no additional scripts are required. A detailed list of all supported SPI flashes can be found here: https://www.segger.com/products/debug-probes/j-link/technology/cpus-and-devices/supported-spi-flashes/

Multi-core support for iMX7D

J-Link script files are necessary to connect to both A7 cores and the M4 core of the iMX7D MCU.

Example package for J-Link Commander:

How to use script files: Please refer to J-Link User Guide (UM08001), chapter 5.11 "J-Link script files"

Startup procedure is:

1)     Start debug session that connects to A7_0
2)     Start debug session that connects to A7_1
3)     Start debug session that connects to M4
[...]
x)     Close debug session that connects to M4
x + 1) Close debug session that connects to A7_1
x + 2) Close debug session that connects to A7_0

Important!

On the iMX7D the A7_1 core cannot be independently debugged without enabling the core by either having something running on the A7_0 or M4 that enables the A7_1 or as part of the A7_0 J-Link script file. In the example script file above, we chose the later case to enable the A7_1 core from within the A7_0 J-Link script file.

Cortex-M4 core

M4 Debug Application (Example)

In order to debug an application running on the M4, the application needs to be loaded on the Cortex-M4 using the Cortex-A7. This can be done either by the application running on the A7 core or by loading the code manually (e.g. using J-Link Commander). A step-by-step instruction with detailed information is provided by NXP in the Application Note AN5317 (http://www.nxp.com/assets/documents/data/en/application-notes/AN5317.pdf). A short step-by-step instruction which shows how to reload & debug the code on the M4 using J-Link Commander is given below. The used application is part of the FreeRTOS example, available for download on the NXP webpage. The example has been created to run on the MCIMX7SABRE evaluation board (red LED D10 blinks): File:blinking imx demo gpt.zip. The example assumes that a UART connection to the debug UART of the M4 is open.

  1. Prepare the debug UART
    1. Supply power to the MCIMX7SABRE evaluation board
    2. Connect the DEBUG UART via USB to the PC
    3. Connect to the M4 debug UART using a terminal application (e.g. HTerm; COMxxx; Baud: 115200; Data: 8; Stop: 1; Parity: None)
  2. Download the application to the M4 through the A7
    1. Start J-Link Commander and connect to the A7 main core by selecting "MCIMX7D7_A7_0" as target device
    2. Halt the CPU using the h command in J-Link Commander
    3. Issue a software reset of the M4 (w4 0x3039000C 0xAC)
    4. Load the M4 application code to the TCM_L memory space (loadfile blinking_imx_demo_gpt.bin,0x007F8000)
    5. Set PC and SP according to the build M4 application (In this example: w4 0x00180000 0x20008000 and w4 0x00180004 0x1FFFACFD
    6. Perform a software reset of the M4 core in order to start the application (w4 0x3039000C 0xAA)
  3. If the application has been started successfully, the red LED (D10) starts blinking
    1. Start J-Link Commander and connect to the M4 core using the iMX7D_Connect_CortexM4.JLinkScript J-Link script file
    2. Issue a halt request using the h command in J-Link Commander --> LED stops blinking
    3. Let the application run again using the go command in J-Link Commander --> LED starts blinking again

Debugging in OCRAM

The i.MX7 series devices incorporate a device-specific cache unit that is controlled via the LMEM peripheral/module. In order to allow settings software breakpoints when debugging in RAM, the LMEM module should be disabled. When debugging in OCRAM on the M4 core, the LMEM module needs to be disabled to set any breakpoint. This is needed because the OCRAM is above addr. 0x1FFFFFFF which is the max. address for which HW breakpoints can be used on the M4. This means, for OCRAM debugging, always software breakpoints would be used on the M4 and this requires LMEM to be disabled.

Note: This might be handled automatically by a future J-Link software version but there are no immediate plans yet.