Difference between revisions of "Infineon CYT3BB"

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== Flash memory layout ==
 
== Flash memory layout ==
   
The CYT3BB series devices have 4160 KB Code flash and a 256 KB Work flash. Both flashes are split in an area of large sectors and an area of small sectors.
+
The CYT3BB series devices have 4160 KiB Code flash and a 256 KiB Work flash. Both flashes are split in an area of large sectors and an area of small sectors.
   
 
{| class="wikitable"
 
{| class="wikitable"
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! Flash !! Start adress !! End adress !! Sector size !! Sector count !! Total size
 
! Flash !! Start adress !! End adress !! Sector size !! Sector count !! Total size
 
|-
 
|-
| Code flash large area || 0x10000000 || 0x103EFFFF || 32 KB || 126 || 4032 KB
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| Code flash large area || 0x10000000 || 0x103EFFFF || 32 KiB || 126 || 4032 KiB
 
|-
 
|-
| Code flash small area || 0x103F0000 || 0x1040FFFF || 8 KB || 16 || 128 KB
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| Code flash small area || 0x103F0000 || 0x1040FFFF || 8 KiB || 16 || 128 KiB
 
|-
 
|-
| Work flash large area || 0x14000000 || 0x1402FFFF || 2 KB || 96 || 192 KB
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| Work flash large area || 0x14000000 || 0x1402FFFF || 2 KiB || 96 || 192 KiB
 
|-
 
|-
| Work flash small area || 0x14030000 || 0x1403FFFF || 128 B || 512 || 64 KB
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| Work flash small area || 0x14030000 || 0x1403FFFF || 128 B || 512 || 64 KiB
 
|}
 
|}

Revision as of 08:21, 27 May 2021

CYT3BB (TVII-B-H-4M) is a subfamily of Traveo II microcontrollers containing a Cortex M7 and Cortex M0+ CPU.

Flash memory layout

The CYT3BB series devices have 4160 KiB Code flash and a 256 KiB Work flash. Both flashes are split in an area of large sectors and an area of small sectors.

Flash Start adress End adress Sector size Sector count Total size
Code flash large area 0x10000000 0x103EFFFF 32 KiB 126 4032 KiB
Code flash small area 0x103F0000 0x1040FFFF 8 KiB 16 128 KiB
Work flash large area 0x14000000 0x1402FFFF 2 KiB 96 192 KiB
Work flash small area 0x14030000 0x1403FFFF 128 B 512 64 KiB