Interrupt Vector Table
Revision as of 20:24, 2 May 2019 by MartinBaldwin (talk | contribs) (Created page with "An Interrupt Vector Table is a table (an array) pointing to an array of Interrupt Service Routines. Typically, the Interrupt Vector Table is a maintained manually by the p...")
An Interrupt Vector Table is a table (an array) pointing to an array of Interrupt Service Routines. Typically, the Interrupt Vector Table is a maintained manually by the programmer (in an ASM File, such as the startup code). Depending on the architecture, that might also be done automatically (by declaring a routine as an interrupt service handler (ISR), and preceeding it by a pragma directive). The interrupt vector table can be fixed (such as for ARM Cortex-M0 CPUs) or variable, in which case some sort of "Interrupt vector table base register" exists. This typically allows mapping the Interrupt vector table to RAM, so that it can also be modified by the running program.
