J-Link ARMv8-AR

This article describes the debugging specifics for ARMv8-A/R based chips & cores.

Debugging through execution state changes

The ARMv8-A/R architecture describes 2 execution states:

• AArch64
• AArch32

An execution state change can only happen when changing the exception level (EL0-EL3).
While J-Link supports debugging through code that changes between AArch32 and AArch64, most debuggers / IDEs do not. For example with GDB it is not possible to debug an application that contains AArch32 and AArch64 code because the register set as well as the instruction set changes with the execution state, which is problematic.

EL2 registers

If exception level 2 (EL2) is implemented (this is an optional exception level), there are some registers that are specific to EL2.
If EL2 runs in AArch32 execution state:

• ELR_hyp
• HSR
• SPSR_hyp

If EL2 runs in AArch64 execution state:

• ELR_EL2
• ESR_EL2
• SPSR_EL2

The above mentioned registers are mapped to each other (so they only exist once in hardware).

Note:

• The EL2 registers are only accessible if the core is in EL2. For example if the core is halted in EL1, they cannot be written / read by J-Link.
  If J-Link would temporarily change to EL2 to read them, the EL switch would cause the register values to become invalid / unknown (by ARMv8-A/R architecture definition).
  
• If a debugger requests these registers while the core is not in EL2 mode, J-Link will return all 0s for them.