Difference between revisions of "J-Link PLUS Compact V11"

From SEGGER Wiki
Jump to: navigation, search
(Created page with "This page contains the general, mechanical and electrical specifications as well as an overview of supported soft- and hardware features of the SEGGER '''J-Link PLUS Compact V...")
 
(Specifications)
Line 162: Line 162:
 
|-
 
|-
 
! style="text-align:left;"|RX64M || {{YES}}
 
! style="text-align:left;"|RX64M || {{YES}}
|}
 
 
== Specifications ==
 
{| class="wikitable"
 
|-
 
! Specification !! Value
 
|-
 
!colspan="2"| General
 
|-
 
| Supported OS || Microsoft Windows (x86/x64), Linux (x86/x64/Arm), macOS (x86)
 
|-
 
| Electromagnetic compatibility (EMC) || EN 55022, EN 55024
 
|-
 
| Operating temperature || +5°C ... +60°C
 
|-
 
| Storage temperature || -20°C ... +65 °C
 
|-
 
| Relative humidity (non-condensing) || Max. 90% rH
 
|-
 
!colspan="2"| Mechanical
 
|-
 
| Size (without cables) || 100mm x 53mm x 27mm
 
|-
 
| Weight (without cables) || 70g
 
|-
 
!colspan="2"| Available interfaces
 
|-
 
| USB interface || USB 2.0 (Hi-Speed); USB Type B
 
|-
 
| Target interface || JTAG 20-pin (14-pin and other adapters [https://www.segger.com/products/debug-probes/j-link/accessories/adapters/overview/ available])<br>
 
|-
 
!colspan="2"| JTAG/SWD Interface, Electrical
 
|-
 
| Power supply || USB powered Max. 50mA + Target Supply current.
 
|-
 
| Target interface voltage (V<sub>IF</sub>) || 1.2V ... 5V
 
|-
 
| Target supply voltage || 5V (derived from USB voltage)
 
|-
 
| Target supply current || Max. 300mA
 
|-
 
| Reset Type || Open drain. Can be pulled low or tristated.
 
|-
 
| Reset low level output voltage (V<sub>OL</sub>) || V<sub>OL</sub> <= 10% of V<sub>IF</sub>
 
|- style="text-align:center"
 
|colspan="2"| '''For the whole target voltage range (1.2V <= V<sub>IF</sub> <= 5V)'''
 
|-
 
| LOW level input voltage (V<sub>IL</sub>) || V<sub>IL</sub> <= 40% of V<sub>IF</sub>
 
|-
 
| HIGH level input voltage (V<sub>IH</sub>) || V<sub>IH</sub> >= 60% of V<sub>IF</sub>
 
|- style="text-align:center"
 
|colspan="2"| '''For 1.2V <= V<sub>IF</sub> <= 3.6V'''
 
|-
 
| LOW level output voltage (V<sub>OL</sub>) with a load of 10 kOhm || V<sub>OL</sub> <= 20% of V<sub>IF</sub>
 
|-
 
| HIGH level output voltage (V<sub>OH</sub>) with a load of 10 kOhm || V<sub>OH</sub> >= 80% of V<sub>IF</sub>
 
|- style="text-align:center"
 
|colspan="2"| '''For 3.6 <= V<sub>IF</sub> <= 5V'''
 
|-
 
| LOW level output voltage (V<sub>OL</sub>) with a load of 10 kOhm || V<sub>OL</sub> <= 20% of V<sub>IF</sub>
 
|-
 
| HIGH level output voltage (V<sub>OH</sub>) with a load of 10 kOhm || V<sub>OH</sub> >= 80% of V<sub>IF</sub>
 
|-
 
!colspan="2"| JTAG/SWD Interface, Timing
 
|-
 
| Target interface speed || Max. 15 MHz
 
|-
 
| SWO sampling frequency || Max. 30 MHz
 
|-
 
| Data input rise time (T<sub>rdi</sub>) || T<sub>rdi</sub> <= 20ns
 
|-
 
| Data input fall time (T<sub>fdi</sub>) || T<sub>fdi</sub> <= 20ns
 
|-
 
| Data output rise time (T<sub>rdo</sub>) || T<sub>rdo </sub><= 10ns
 
|-
 
| Data output fall time (T<sub>fdo</sub>) || T<sub>fdo</sub> <= 10ns
 
|-
 
| Clock rise time (T<sub>rc</sub>) || T<sub>rc</sub> <= 3ns
 
|-
 
| Clock fall time (T<sub>fc</sub>) || T<sub>fc</sub> <= 3ns
 
 
|}
 
|}

Revision as of 10:56, 10 December 2021

This page contains the general, mechanical and electrical specifications as well as an overview of supported soft- and hardware features of the SEGGER J-Link PLUS Compact V11.

Hardware and Software Features

Hardware version 11
Hardware Features
USB 2.0 Full Speed YES.png
USB 2.0 Hi-Speed YES.png
JTAG interface YES.png
cJTAG interface YES.png
SWD interface YES.png
SWO interface YES.png
SPI interface YES.png
QSPI interface NO.png
Microchip ICSP interface YES.png
Renesas FINE interface YES.png
SiLabs C2 2-wire interface YES.png
ETB Trace ARM7/9 YES.png
ETB Trace Cortex-M YES.png
ETB Trace Cortex-A/R YES.png
ETM Trace Cortex-M NO.png
VCOM YES.png
Memory Stop mode support YES.png
Cortex-M Monitor Mode debugging NO.png
SWD Multi-Drop YES.png
CMSIS-DAP mode YES.png
ARM legacy Cores
ARM7 YES.png
ARM9 YES.png
ARM11 YES.png
ARM Cortex Cores
Cortex-A5 YES.png
Cortex-A7 YES.png
Cortex-A8 YES.png
Cortex-A9 YES.png
Cortex-A12 YES.png
Cortex-A15 YES.png
Cortex-A17 YES.png
Cortex-A53 YES.png
Cortex-A57 YES.png
Cortex-A72 YES.png
Cortex-M0 YES.png
Cortex-M0+ YES.png
Cortex-M1 YES.png
Cortex-M3 YES.png
Cortex-M4 YES.png
Cortex-M7 YES.png
Cortex-M23 YES.png
Cortex-M33 YES.png
Cortex-R4 YES.png
Cortex-R5 YES.png
Cortex-R8 YES.png
SC000 (M0 secure) YES.png
SC300 (M3 secure) YES.png
RISC-V
RV32 YES.png
RV64 YES.png
Microchip PIC32
PIC32MX YES.png
PIC32MZ YES.png
SiLabs 8051
EFM8 YES.png
Renesas RX
RX110 YES.png
RX111 YES.png
RX210 YES.png
RX21A YES.png
RX220 YES.png
RX610 YES.png
RX621 YES.png
RX62G YES.png
RX62G YES.png
RX62N YES.png
RX62T YES.png
RX630 YES.png
RX631 YES.png
RX63N YES.png
RX63T YES.png
RX64M YES.png