Difference between revisions of "J-Link PLUS V11"

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(Hardware and Software Features)
(Hardware and Software Features)
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! style="text-align:left;"|USB 2.0 Hi-Speed || {{YES}}
! style="text-align:left;"|USB 2.0 Hi-Speed || {{YES}}
! style="text-align:left;"|WinUSB || {{YES}}
! style="text-align:left;"|JTAG interface || {{YES}}
! style="text-align:left;"|JTAG interface || {{YES}}

Revision as of 14:58, 14 February 2022

This page contains the general, mechanical and electrical specifications as well as an overview of supported soft- and hardware features of the SEGGER J-Link PLUS V11.

Hardware and Software Features

Hardware version 11
Hardware Features
USB 2.0 Full Speed YES.png
USB 2.0 Hi-Speed YES.png
WinUSB YES.png
JTAG interface YES.png
cJTAG interface YES.png
SWD interface YES.png
SWO interface YES.png
SPI interface YES.png
QSPI interface NO.png
Microchip ICSP interface YES.png
Renesas FINE interface YES.png
SiLabs C2 2-wire interface YES.png
ETB Trace ARM7/9 YES.png
ETB Trace Cortex-M YES.png
ETB Trace Cortex-A/R YES.png
ETM Trace Cortex-M NO.png
Memory Stop mode support YES.png
Cortex-M Monitor Mode debugging NO.png
SWD Multi-Drop YES.png
CMSIS-DAP mode YES.png
ARM legacy Cores
ARM7 YES.png
ARM9 YES.png
ARM11 YES.png
ARM Cortex Cores
Cortex-A5 YES.png
Cortex-A7 YES.png
Cortex-A8 YES.png
Cortex-A9 YES.png
Cortex-A12 YES.png
Cortex-A15 YES.png
Cortex-A17 YES.png
Cortex-A53 YES.png
Cortex-A57 YES.png
Cortex-A72 YES.png
Cortex-M0 YES.png
Cortex-M0+ YES.png
Cortex-M1 YES.png
Cortex-M3 YES.png
Cortex-M4 YES.png
Cortex-M7 YES.png
Cortex-M23 YES.png
Cortex-M33 YES.png
Cortex-R4 YES.png
Cortex-R5 YES.png
Cortex-R8 YES.png
SC000 (M0 secure) YES.png
SC300 (M3 secure) YES.png
RV32 YES.png
RV64 YES.png
Microchip PIC32
SiLabs 8051
EFM8 YES.png
Renesas RX
RX110 YES.png
RX111 YES.png
RX210 YES.png
RX21A YES.png
RX220 YES.png
RX610 YES.png
RX621 YES.png
RX62G YES.png
RX62G YES.png
RX62N YES.png
RX62T YES.png
RX630 YES.png
RX631 YES.png
RX63N YES.png
RX63T YES.png
RX64M YES.png


Specification Value
Supported OS Microsoft Windows (x86/x64), Linux (x86/x64/Arm), macOS (x86)
Electromagnetic compatibility (EMC) EN 55022, EN 55024
Operating temperature +5°C ... +60°C
Storage temperature -20°C ... +65 °C
Relative humidity (non-condensing) Max. 90% rH
Size (without cables) 100mm x 53mm x 27mm
Weight (without cables) 70g
Available interfaces
USB interface USB 2.0 (Hi-Speed); USB Type B
Target interface JTAG 20-pin (14-pin and other adapters available)
JTAG/SWD Interface, Electrical
Power supply USB powered Max. 50mA + Target Supply current.
Target interface voltage (VIF) 1.2V ... 5V
Target supply voltage 5V (derived from USB voltage)
Target supply current Max. 300mA
Reset Type Open drain. Can be pulled low or tristated.
Reset low level output voltage (VOL) VOL <= 10% of VIF
For the whole target voltage range (1.2V <= VIF <= 5V)
LOW level input voltage (VIL) VIL <= 40% of VIF
HIGH level input voltage (VIH) VIH >= 60% of VIF
For 1.2V <= VIF <= 3.6V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 20% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 80% of VIF
For 3.6 <= VIF <= 5V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 20% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 80% of VIF
JTAG/SWD Interface, Timing
Target interface speed Max. 15 MHz
SWO sampling frequency Max. 30 MHz
Data input rise time (Trdi) Trdi <= 20ns
Data input fall time (Tfdi) Tfdi <= 20ns
Data output rise time (Trdo) Trdo <= 10ns
Data output fall time (Tfdo) Tfdo <= 10ns
Clock rise time (Trc) Trc <= 3ns
Clock fall time (Tfc) Tfc <= 3ns