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Welcome to the SEGGER - Support Wiki

Debug Probes - J-Link & J-Trace

J-Link

Troubleshooting

• Debug session does not start
• J-Link can't connect to the CPU
• J-Link-OB SAM3U
• J-Link-OB-RX621-ARM-SWD
• SPI Flash
• Unlimited Number of Breakpoints in Flash

Device specifics

Intel

• Intel Quark processors

NXP (Freescale)

• Kinetis Series Devices
• Connecting J-Link to LPCXpresso LPC1769
• Using LPC-Link 2 on LPCXpresso V2/V3
• i.MX6 SoloX Support
• Dual Core Debugging on LPC4350 with Embedded Studio
• Triple Core Debugging on LPC4367 with Embedded Studio

Renesas

• RZ/G1
• Using RTT on RZ A1H

Silicon Labs

• EM35x

ST

• Connecting to STM32 Nucleo boards
• Using SWO on STM327xxG evaluation boards
• Setting read out protection on STM32F0 devices
• Secured ST device detected
• STM32L4 dualbank flash programming
• SPC560D-Discovery Evalboard
• STM32F4

TI

• TMS570 series
• TM4C123G LaunchPad

Toshiba

• TMPM46BF10FG Evaluation Board

Evaluation board specifics

Atmel

• SAM C21 Xplained Pro

Renesas

• RZ/G1E Starter Kit

Silicon Labs

• EFM Starter Kits

Open Flash Loader

• Adding Support for New Devices

J-Trace

TRACE

• General notes for trace configuration

Keil MDK

• 4-Pin Trace with STM32F2 / STM32F4
• 4-Pin Trace with LPC4357

Embedded Studio

• ETB trace on NXP TWR-K65F

Miscellaneous

Glossary / Definitions

• JTAG
• SWD
• SWO
• ETB
• ETM
• TMC
• MCU Security Options
• J-Link Command Strings

J-Link Software and Documentation Pack

J-Link DLL

• Enable J-Link Log File

J-Link Commander

• Perform flash download
• Batch processing
• JLink.exe return value

J-Flash

• CRC calculation

FAQ

• Using Ethernet in TI's Code Composer Studio (CCS)
• Software and Hardware Features Overview