Difference between revisions of "MindMotion MM32F5"

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(Supported Flash Banks)
(Example Application)
 
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__TOC__
 
__TOC__
The Mindmotion MM32F5270 and MM32F5280 microcontroller is based on ARM®STAR-MC1 processor. Built-in <br>
+
The Mindmotion MM32F5 series microcontrollers are based on ARM®STAR-MC1 processor. Built-in <br>
 
L1 ICache, DCache, instruction tightly coupled memory ITCM and data tightly coupled memory DTCM,<br>
 
L1 ICache, DCache, instruction tightly coupled memory ITCM and data tightly coupled memory DTCM,<br>
 
with high performance and low power consumption.<br>
 
with high performance and low power consumption.<br>
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{| class="seggertable"
 
{| class="seggertable"
 
|-
 
|-
! StartAddr !! Size
+
! Device || StartAddr !! Size || J-Link Support
 
|-
 
|-
| 0x08000000 || 256 KB
+
| MM32F5233 ||0x08000000 || 128 KB || {{YES}}
  +
|-
  +
| MM32F5333 ||0x08000000 || 128 KB || {{YES}}
  +
|-
  +
| MM32F5277 ||0x08000000 || 256 KB || {{YES}}
  +
|-
  +
| MM32F5287 ||0x08000000 || 256 KB || {{YES}}
 
|}
 
|}
   
===QSPI flash (in package)===
+
===QSPI flash ===
 
{| class="seggertable"
 
{| class="seggertable"
 
|-
 
|-
! StartAddr !! Size
+
! Device || StartAddr !! Size || J-Link Support
 
|-
 
|-
| 0x90000000 || Up to XXX MB
+
| MM32F5277 ||0x90000000 || External, up to 256MB || {{YES}}
  +
|-
  +
| MM32F5287 ||0x90000000 || In package, 1024/2048KB || {{YES}}
  +
|}
  +
  +
===Option Byte ===
  +
{| class="seggertable"
  +
|-
  +
! Device || StartAddr !! Size || J-Link Support
  +
|-
  +
| MM32F5233 ||0x1FFFF800 ||512 Byte || {{YES}}
  +
|-
  +
| MM32F5333 ||0x1FFFF800 ||512 Byte || {{YES}}
  +
|-
  +
| MM32F5277 ||0x1FFFF800 ||512 Byte || {{YES}}
  +
|-
  +
| MM32F5287 ||0x1FFFF800 ||512 Byte || {{YES}}
 
|}
 
|}
   
 
*** Additional information ***
 
*** Additional information ***
  +
* Pay attention, for debug and flash program supported maximum CPU Frequency is 96 MHz.
External QSPI Flash starting at 0x9000 0000 (End is defined by QSPI flash Size)<br>
 
  +
* After erasing the option byte on MM32F5233 devices, the correct boot address has to be programmed at BOOT_ADDR.
For now, the J-Link supports only this sections and MM32F5270 Family.<br>
 
Pay attention, for debug and flash program support maximum CPU Frequency is 96 MHz.
 
   
 
==Reset==
 
==Reset==
 
The device uses normal reset, no special handling necessary.
 
The device uses normal reset, no special handling necessary.
  +
  +
==Minimum requirements==
  +
* J-Link software V7.92e or later
  +
 
==Evaluation Boards==
 
==Evaluation Boards==
*Mindmotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270
+
*MindMotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270
  +
*MindMotion BIRD-F3/F5 MM32F5287 evaluation board: https://wiki.segger.com/Mindmotion_BIRD-F3F5_MM32F5287
  +
*MindMotion Mini-F5233-MM32F5233D7P evaluation board: https://wiki.segger.com/Mindmotion_Mini-F5233-MM32F5233D7P
  +
*MindMotion MB-083 Mini-F5333 evaluation board: https://wiki.segger.com/MindMotion_MB-083-Mini-F5333
   
 
==Example Application==
 
==Example Application==
*Mindmotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270#Example_Project
+
*MindMotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270#Example_Project
  +
*MindMotion BIRD-F3/F5 MM32F5287 evaluation board: https://wiki.segger.com/Mindmotion_BIRD-F3F5_MM32F5287#Example_Project
  +
*MindMotion Mini-F5233-MM32F5233D7P evaluation board: https://wiki.segger.com/Mindmotion_Mini-F5233-MM32F5233D7P#Example_Project
  +
*MindMotion MB-083 Mini-F5333 evaluation board: https://wiki.segger.com/MindMotion_MB-083-Mini-F5333#Example_Project

Latest revision as of 12:33, 7 September 2023

The Mindmotion MM32F5 series microcontrollers are based on ARM®STAR-MC1 processor. Built-in
L1 ICache, DCache, instruction tightly coupled memory ITCM and data tightly coupled memory DTCM,
with high performance and low power consumption.

Supported Flash Banks

Internal Flash

Device StartAddr Size J-Link Support
MM32F5233 0x08000000 128 KB YES.png
MM32F5333 0x08000000 128 KB YES.png
MM32F5277 0x08000000 256 KB YES.png
MM32F5287 0x08000000 256 KB YES.png

QSPI flash

Device StartAddr Size J-Link Support
MM32F5277 0x90000000 External, up to 256MB YES.png
MM32F5287 0x90000000 In package, 1024/2048KB YES.png

Option Byte

Device StartAddr Size J-Link Support
MM32F5233 0x1FFFF800 512 Byte YES.png
MM32F5333 0x1FFFF800 512 Byte YES.png
MM32F5277 0x1FFFF800 512 Byte YES.png
MM32F5287 0x1FFFF800 512 Byte YES.png
  *** Additional information ***
  • Pay attention, for debug and flash program supported maximum CPU Frequency is 96 MHz.
  • After erasing the option byte on MM32F5233 devices, the correct boot address has to be programmed at BOOT_ADDR.

Reset

The device uses normal reset, no special handling necessary.

Minimum requirements

  • J-Link software V7.92e or later

Evaluation Boards

Example Application