MindMotion MM32F5

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Revision as of 07:42, 9 November 2022 by Torben.scharping (talk | contribs) (Supported Flash Banks)
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The Mindmotion MM32F5270 and MM32F5280 microcontroller is based on ARM®STAR-MC1 processor. Built-in
L1 ICache, DCache, instruction tightly coupled memory ITCM and data tightly coupled memory DTCM,
with high performance and low power consumption.

Supported Flash Banks

Internal Flash

Device StartAddr Size J-Link Support
MM32F5270 0x08000000 256 KB YES
MM32F5280 0x08000000 256 KB No

QSPI flash

Device StartAddr Size J-Link Support
MM32F5270 0x90000000 External, up to 256Mb Yes
MM32F5280 0x90000000 In package, 2048Kb No

Option Byte

Device StartAddr Size J-Link Support
MM32F5270 0x1FFFF800 521 Byte Yes
MM32F5280 0x1FFFF800 521 Byte No
  *** Additional information ***

External QSPI Flash starting at 0x9000 0000 (End is defined by QSPI flash Size)
For now, the J-Link supports only this sections and MM32F5270 Family.
Pay attention, for debug and flash program support maximum CPU Frequency is 96 MHz.

Reset

The device uses normal reset, no special handling necessary.

Evaluation Boards

Example Application