Difference between revisions of "PSoC 4xxx series"
m (Fabian moved page PSoC 4xxx series readout protection to PSoC 4xxx series: Added to a part of a general PSoC 4xxx series article) |
|||
(9 intermediate revisions by the same user not shown) | |||
Line 1: | Line 1: | ||
+ | This page contains information about the Cypress PSoC 4xxx series. |
||
__TOC__ |
__TOC__ |
||
+ | =Connection behavior= |
||
+ | The connect sequence of PSoC 4 devices is very time critical and is performed from the J-Link's side directly. |
||
+ | |||
+ | A locked PSoC 4 device is automatically set to ''open'' if it was in ''protected'' state. |
||
+ | If the device was unlocked, following message is shown: |
||
+ | |||
+ | [[File:Device_was_unlocked.PNG]] |
||
+ | |||
+ | =Readout protection= |
||
+ | The following section explains how to set Cypress PSoC 4 devices in protected state and how to unprotect them. |
||
== Securing device after programming == |
== Securing device after programming == |
||
The Cypress CY8C4xxx and CYBLExxxx series devices provide chip-level protection which allows "permanent" protection of the device concerning read and write access. The sequence, to secure the device consists of multiple read / write accesses to special function registers of the CY8C4xxx and CYBLExxxx series devices. |
The Cypress CY8C4xxx and CYBLExxxx series devices provide chip-level protection which allows "permanent" protection of the device concerning read and write access. The sequence, to secure the device consists of multiple read / write accesses to special function registers of the CY8C4xxx and CYBLExxxx series devices. |
||
Line 9: | Line 20: | ||
'''Note:''' PSoC4100/4200 target devices use different addresses for the SYSREQ and SYSARG registers. They are located at 0x40000004 and 0x40000008 instead. For more information please consult the CypressProgramming Specifications user guide. |
'''Note:''' PSoC4100/4200 target devices use different addresses for the SYSREQ and SYSARG registers. They are located at 0x40000004 and 0x40000008 instead. For more information please consult the CypressProgramming Specifications user guide. |
||
− | '''Note2:''' The clock of |
+ | '''Note2:''' The clock of some PSoC4 target devices must be set to 48MHz before calling the locking/unlocking sequence. This can be achieved by using the "Configure Clock" Command. |
[[File:Wiki-Cypress_PSoC-BL_ProtectCPU.png]] |
[[File:Wiki-Cypress_PSoC-BL_ProtectCPU.png]] |
||
+ | === Protection levels === |
||
+ | For Cypress PSoC4 devices three levels of protection can be set by altering the ''SYSARG chip protection'' step in the examples above: |
||
+ | |||
+ | {| class="wikitable" |
||
+ | |'''Value''' |
||
+ | |'''Effect''' |
||
+ | |- |
||
+ | |''0x00'''01'''E0B6'' |
||
+ | |Read protection level ''open''. Device is unprotected |
||
+ | |- |
||
+ | |''0x00'''02'''E0B6'' |
||
+ | |Read protection level ''protected''. Device is protected. Setting the mode to ''open'' again causes a mass erase. |
||
+ | |- |
||
+ | |''0x00'''04'''E0B6'' |
||
+ | |Read protection level ''kill''. Device is protected. The protection level cannot be changed anymore. '''Setting to ''kill'' mode is permanent and makes the device unrecoverable'''. |
||
+ | |} |
||
== Unsecuring device before reprogramming == |
== Unsecuring device before reprogramming == |
||
The Cypress CY8C4xxx and CYBLExxxx series devices provide chip-level protection which allows "permanent" protection of the device concerning read and write access. The sequence, to unsecure the device consists of multiple read / write accesses to special function registers of the Cypress CY8C4xxx and CYBLExxxx series devices MCU. |
The Cypress CY8C4xxx and CYBLExxxx series devices provide chip-level protection which allows "permanent" protection of the device concerning read and write access. The sequence, to unsecure the device consists of multiple read / write accesses to special function registers of the Cypress CY8C4xxx and CYBLExxxx series devices MCU. |
||
=== Via J-Flash / Flasher ARM === |
=== Via J-Flash / Flasher ARM === |
||
− | J-Flash('''v6.31k and following''') detects if the device is secured. In case of a secured device |
+ | J-Flash('''v6.31k and following''') detects if the device is secured. In case of a secured device it will unsecure it. This sequence applies for all Cypress CY8C4xxx and CYBLExxxx series devices since they are compatible regarding secure procedure. |
Revision as of 10:24, 23 July 2019
This page contains information about the Cypress PSoC 4xxx series.
Contents
Connection behavior
The connect sequence of PSoC 4 devices is very time critical and is performed from the J-Link's side directly.
A locked PSoC 4 device is automatically set to open if it was in protected state. If the device was unlocked, following message is shown:
Readout protection
The following section explains how to set Cypress PSoC 4 devices in protected state and how to unprotect them.
Securing device after programming
The Cypress CY8C4xxx and CYBLExxxx series devices provide chip-level protection which allows "permanent" protection of the device concerning read and write access. The sequence, to secure the device consists of multiple read / write accesses to special function registers of the CY8C4xxx and CYBLExxxx series devices.
Via J-Flash / Flasher ARM
The sequence to secure the device, needs to be added to the exit-steps of the J-Flash project. The exit steps will be executed at the end of an successful auto-programming process (Target -> Auto). J-Flash comes with an example project for the Cypress CYBLE-214009-00 device which contains a secure device programming sequence (File:Cypress CYBLE 214009-00.jflash). This sequence applies for all Cypress CY8C4xxx and CYBLExxxx series devices since they are compatible regarding secure procedure and can be adapted to fit custom requirements, by re-selecting the required device within the J-Flash project.
Note: PSoC4100/4200 target devices use different addresses for the SYSREQ and SYSARG registers. They are located at 0x40000004 and 0x40000008 instead. For more information please consult the CypressProgramming Specifications user guide.
Note2: The clock of some PSoC4 target devices must be set to 48MHz before calling the locking/unlocking sequence. This can be achieved by using the "Configure Clock" Command.
Protection levels
For Cypress PSoC4 devices three levels of protection can be set by altering the SYSARG chip protection step in the examples above:
Value | Effect |
0x0001E0B6 | Read protection level open. Device is unprotected |
0x0002E0B6 | Read protection level protected. Device is protected. Setting the mode to open again causes a mass erase. |
0x0004E0B6 | Read protection level kill. Device is protected. The protection level cannot be changed anymore. Setting to kill mode is permanent and makes the device unrecoverable. |
Unsecuring device before reprogramming
The Cypress CY8C4xxx and CYBLExxxx series devices provide chip-level protection which allows "permanent" protection of the device concerning read and write access. The sequence, to unsecure the device consists of multiple read / write accesses to special function registers of the Cypress CY8C4xxx and CYBLExxxx series devices MCU.
Via J-Flash / Flasher ARM
J-Flash(v6.31k and following) detects if the device is secured. In case of a secured device it will unsecure it. This sequence applies for all Cypress CY8C4xxx and CYBLExxxx series devices since they are compatible regarding secure procedure.