Difference between revisions of "QSPI Flash Programming Support"
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== Solution == |
== Solution == |
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− | For |
+ | For any supported QSPI Controller SEGGER creates 1-2 example flash loader based on the pin configuration of the evaluation board. If you choose the same pin layout as used on the evaluation board, the flash algorithms can be used out-of-the-box. |
== Customized Solution Required == |
== Customized Solution Required == |
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+ | If the pin configuration differs from the one listed on the wiki page of the device, you will need a custom flash loader. |
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− | If there is no example flash algorithm for your port / pin configuration available, the flash algorithm needs to be slightly modified. In general this change effects the pin / port initialization, only. For further information regarding the Open Flashloader and how to use the JLinkDevices.xml file, please refer to the J-Link User Manual (UM08001), chapter 10 Open Flashloader. |
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+ | There are three options for the development of a custom flash loader: |
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+ | #You may add a custom flash loader yourself with the SEGGER [[J-Link_Device_Support_Kit | Device Support Kit]] (DSK). |
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+ | #You develop a custom flash loader with the help of the existing flash loaders' source code. |
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+ | #SEGGER develops the custom flash loader for you. |
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+ | If you are interested in any of those options, please contact info@segger.com. |
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− | == Specific Landing Pages Provide Following Information == |
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− | * Setup (CPU / board) |
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− | * Port / pin configuration |
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− | * JLinkDevices.XML |
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− | * Files |
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+ | == Multiple flash loader == |
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− | == Overview of Available QSPI Flashloader == |
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+ | Any custom pin configuration loader that is developed by SEGGER will be supported through the [[J-Link_Multiple_Flashloader|multiple loader]] concept. This means that the new pin configuration will be selectable for the device/flash bank. |
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− | * ST |
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− | ** [[STM32F446 (Custom Board)]] |
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− | ** [[STM32L476 (STM32L476 Discovery)]] |
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− | ** [[STM32L476 (STM32L476 Eval)]] |
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− | ** [[STM32F746 (STM32F746 Discovery)]] |
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− | * NXP (Freescale) |
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− | ** [[iMX6SX]] |
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− | ** [[iMX7UL (MCIMX6UL-EVK)]] |
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− | ** [[MK80FN256V15 (TWR-K80F150M)]] |
Revision as of 13:11, 15 November 2022
Contents
General Information
More and more CPUs include an so called SPIFI memory controller which allows memory mapped read accesses to any SPI flash, connected to the Quad-SPI interface of the CPU. This allows the J-Link DLL to support flash programming through the Quad-SPI interface of the CPU.
Problem
Some CPUs allow to use different port / pin configurations for the connection of the SPI flash. Thus, for each possible pin / port configuration a slightly different flash algorithm is required, even if the same SPI flash and the same CPU is used.
Solution
For any supported QSPI Controller SEGGER creates 1-2 example flash loader based on the pin configuration of the evaluation board. If you choose the same pin layout as used on the evaluation board, the flash algorithms can be used out-of-the-box.
Customized Solution Required
If the pin configuration differs from the one listed on the wiki page of the device, you will need a custom flash loader. There are three options for the development of a custom flash loader:
- You may add a custom flash loader yourself with the SEGGER Device Support Kit (DSK).
- You develop a custom flash loader with the help of the existing flash loaders' source code.
- SEGGER develops the custom flash loader for you.
If you are interested in any of those options, please contact info@segger.com.
Multiple flash loader
Any custom pin configuration loader that is developed by SEGGER will be supported through the multiple loader concept. This means that the new pin configuration will be selectable for the device/flash bank.