QSPI Flash Programming Support

General Information

More and more CPUs include an so called SPIFI memory controller which allows memory mapped read accesses to any SPI flash, connected to the Quad-SPI interface of the CPU. This allows the J-Link DLL to support flash programming through the Quad-SPI interface of the CPU.

Problem

Some CPUs allow to use different port / pin configurations for the connection of the SPI flash. Thus, for each possible pin / port configuration a slightly different flash algorithm is required, even if the same SPI flash and the same CPU is used.

Solution

For any supported QSPI Controller SEGGER creates 1-2 example flash loader based on the pin configuration of the evaluation board. If you choose the same pin layout as used on the evaluation board, the flash algorithms can be used out-of-the-box.

Customized Solution Required

If the pin configuration differs from the one listed on the wiki page of the device, you will need a custom flash loader. There are three options for the development of a custom flash loader:

1. You may add a custom flash loader yourself with the SEGGER Device Support Kit (DSK).
2. You develop a custom flash loader with the help of the existing flash loaders' source code.
3. SEGGER develops the custom flash loader for you.

If you are interested in any of those options, please get in touch with SEGGER directly via our support ticket system: https://support.segger.com/.

Multiple flash loader

Any custom pin configuration loader that is developed by SEGGER will be supported through the multiple loader concept. This means that the new pin configuration will be selectable for the device/flash bank.