Difference between revisions of "QSPI Flash Programming Support"

From SEGGER Wiki
Jump to: navigation, search
(SPIFI library default behavior)
(SPIFI library default behavior)
Line 20: Line 20:
 
Any custom pin configuration loader that is developed by SEGGER will be supported through the [[J-Link_Multiple_Flashloader|multiple loader]] concept. This means that the new pin configuration will be selectable for the device/flash bank.
 
Any custom pin configuration loader that is developed by SEGGER will be supported through the [[J-Link_Multiple_Flashloader|multiple loader]] concept. This means that the new pin configuration will be selectable for the device/flash bank.
   
== SPIFI library default behavior ==
+
== SPIFI flash loader default behavior ==
   
  +
In general, SEGGERs SPIFI flash loaders try to leave the device in the same state as it was before the flash operation. This means that any register, that is used by the flash loader, is initially saved and later restored by the flash loader.
*Erase: Block-by-block (usually 64 KB)<br> If you require a finer modification of data, we recommend using [[Read-Modify-Write Flash | Read-Modify-Write]]
 
  +
=== Erase ===
*Program: page-by-page (usually 256 Bytes)
 
  +
Erase is done Block-by-block, which usually means 64 KB.
  +
If you require a finer modification of data, we recommend using [[Read-Modify-Write Flash | Read-Modify-Write]] or a customized flash loader.
  +
=== Program ===
  +
Program is done page-by-page. With most flashes this is 256 Bytes.

Revision as of 09:17, 16 January 2023

General Information

More and more CPUs include an so called SPIFI memory controller which allows memory mapped read accesses to any SPI flash, connected to the Quad-SPI interface of the CPU. This allows the J-Link DLL to support flash programming through the Quad-SPI interface of the CPU.

Problem

Some CPUs allow to use different port / pin configurations for the connection of the SPI flash. Thus, for each possible pin / port configuration a slightly different flash algorithm is required, even if the same SPI flash and the same CPU is used.

Solution

For any supported QSPI Controller SEGGER creates 1-2 example flash loader based on the pin configuration of the evaluation board. Those flash loaders use SEGGERs SPI Flash Interface Library (SPIFI lib) to support a multitude of different SPI flashes. The list of supported SPI flashes is listed on our website. If you choose the same pin layout as used on the evaluation board, the flash algorithms usually can be used out-of-the-box.

Customized Solution Required

If the pin configuration differs from the one listed on the wiki page of the device, you will need a custom flash loader. There are three options for the development of a custom flash loader:

  1. You may add a custom flash loader yourself with the SEGGER Device Support Kit (DSK).
  2. You develop a custom flash loader with the help of the existing flash loaders' source code.
  3. SEGGER develops the custom flash loader for you.

If you are interested in any of those options, please get in touch with SEGGER directly via our support ticket system: https://support.segger.com/.

Multiple flash loader

Any custom pin configuration loader that is developed by SEGGER will be supported through the multiple loader concept. This means that the new pin configuration will be selectable for the device/flash bank.

SPIFI flash loader default behavior

In general, SEGGERs SPIFI flash loaders try to leave the device in the same state as it was before the flash operation. This means that any register, that is used by the flash loader, is initially saved and later restored by the flash loader.

Erase

Erase is done Block-by-block, which usually means 64 KB. If you require a finer modification of data, we recommend using Read-Modify-Write or a customized flash loader.

Program

Program is done page-by-page. With most flashes this is 256 Bytes.