Renesas DA1459x
Contents
The Renesas DA1459 devices are a family of multi-core Cortex-M33/Cortex-M0 based microcontrollers.
Flash Banks
eFlash Flash
J-Link supports eFlash programming at base address 0x31000000.
QSPI Flash
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
J-Link supports QSPI programming at base address 0x32000000. The maximum flash size is 32 MB.
Watchdog
Device has a system watchdog. It is automatically frozen when Cortex-M33 is in debug mode.
Multi-Core Support
Before proceeding with this article, please check out the generic article regarding Multi-Core debugging here. The DA1470 device include a Cortex-M33 and Cortex-M0. The debug related multi-core behavior of the J-Link is described for each core:
Cortex-M33
Init/Setup
- J-Link performs a default Cortex-M33 init sequence. No special handling is necessary.
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Cortex-M0
J-Link does not support Cortex-M0.
Evaluation Boards
- Renesas DA1459x DevKit evaluation board: https://wiki.segger.com/Renesas_DA1459x_DevKit
