Difference between revisions of "Renesas RZ/G2L SMARC EVK"

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(SETUP)
 
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__TOC__
 
__TOC__
   
This article describes specifics for the Renesas RZG2L EVK. A generic startup guide + additional information can be found on Renesas website.
+
This article describes specifics for the Renesas RZ/G2L EVK. A generic startup guide + additional information can be found on Renesas website.
   
 
[[File:Renesas_RZG2L_EVK.jpg|450px]]
 
[[File:Renesas_RZG2L_EVK.jpg|450px]]
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== Preparing for J-Link ==
 
== Preparing for J-Link ==
*Connect the J-Link to the SWD header (CN2) on the SWARC module
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*Connect the J-Link to the SWD header (CN2) on the SMARC module
 
*Power the board via CN6 (Power Input)
 
*Power the board via CN6 (Power Input)
*Press the POWER button (SW9) in order to supply the SWARC module with power
+
*Press the POWER button (SW9) in order to supply the SMARC module with power
 
*Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
 
*Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
   
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== Example Project==
 
== Example Project==
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Renesas RZG2Lf. It is a simple Hello World sample linked into the internal RAM.<br>
+
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Renesas RZ/G2L. It is a simple Hello World sample linked into the internal RAM.<br>
 
====SETUP====
 
====SETUP====
 
*J-Link software: V7.22
 
*J-Link software: V7.22
 
*Embedded Studio: V5.42
 
*Embedded Studio: V5.42
*Hardware: Renesas RZG2L EVK (SWARC module)
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*Hardware: Renesas RZ/G2L EVK (SMARC module)
 
*Link: [[File:Renesas_RZG2L_RAM_TestProject_ES_V542.zip]]
 
*Link: [[File:Renesas_RZG2L_RAM_TestProject_ES_V542.zip]]

Latest revision as of 11:15, 7 June 2021

This article describes specifics for the Renesas RZ/G2L EVK. A generic startup guide + additional information can be found on Renesas website.

Renesas RZG2L EVK.jpg

Minimum requirements

  • J-Link software V7.22 or later

Preparing for J-Link

  • Connect the J-Link to the SWD header (CN2) on the SMARC module
  • Power the board via CN6 (Power Input)
  • Press the POWER button (SW9) in order to supply the SMARC module with power
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Renesas RZG2L Connect.gif

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Renesas RZ/G2L. It is a simple Hello World sample linked into the internal RAM.

SETUP