Difference between revisions of "SR6P7G7x"

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(RAM initialization)
(RAM initialization)
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During connect 16kB of ECC RAM at 0x60000000 get initialized, which is mandatory for flash programming.
 
During connect 16kB of ECC RAM at 0x60000000 get initialized, which is mandatory for flash programming.
 
The JLinkScript file that is used for the RAM init can be downloaded here and adapted if further RAM needs to be initialized.
 
The JLinkScript file that is used for the RAM init can be downloaded here and adapted if further RAM needs to be initialized.
To increase the size of initialized RAM, adapt within the "InitTarget" function the parameters of the "_InitRAM" function call.
+
To increase the size of initialized RAM, editt within the "InitTarget" function the parameters of the "_InitRAM" function call.
 
The first parameter defines the number of kilobytes and the second parameter the start address of the RAM for init.
 
The first parameter defines the number of kilobytes and the second parameter the start address of the RAM for init.
 
To initialize other RAM areas the "_InitRAM" function can be duplicated with another start address.
 
To initialize other RAM areas the "_InitRAM" function can be duplicated with another start address.

Revision as of 12:10, 22 February 2022

The SR6P7G7C7 is built on ARM® architecture technology and integrates innovations that are important for today’s and tomorrow’s automotive applications. SR6P7G7C7 integration MCUs have been designed to meet the requirements of domain controllers and ECUs with high integration requested in the architectures of connected update-able automated and electrified cars.

General information

Debugging

By default only Cluster0_Core0 (Cortex-R52) is running. To enable all other Cortex-R52 cores and DME and DSPH cores establish a debug connection to Cluster0_Core0 (Cortex-R52) as during the connection procedure all other Cortex-R52 and DME and DSPH cores get enabled.

RAM initialization

During connect 16kB of ECC RAM at 0x60000000 get initialized, which is mandatory for flash programming. The JLinkScript file that is used for the RAM init can be downloaded here and adapted if further RAM needs to be initialized. To increase the size of initialized RAM, editt within the "InitTarget" function the parameters of the "_InitRAM" function call. The first parameter defines the number of kilobytes and the second parameter the start address of the RAM for init. To initialize other RAM areas the "_InitRAM" function can be duplicated with another start address.

_InitRAM call within InitTarget modified for 128KB RAM at 0x60000000

Additional information how to use JLinkScript files can be found here: JLinkScript files

Flash programming

Flash programming of all below listed flash regions is done through Cluster0_Core0 (Cortex-R52). All other Cortex-R52 cores only allow debugging. The flash controller of the SR6P7G7x has no explicit erase function. When reprogramming flash an explicit erase before programming is not necessary. Already programmed flash can be directly reprogrammed.

On-Chip Memory Regions

The internal flash is divided into 13 different regions:

Instance Name Size (bytes) Memory region
RWW partition 0 1792 KBytes 0x28000000 - 0x281BFFFF
RWW partition 1 2048 KBytes 0x281C0000 - 0x283BFFFF
RWW partition 2 1792 KBytes 0x28400000 - 0x285BFFFF
RWW partition 3 2048 KBytes 0x285C0000 - 0x287BFFFF
RWW partition 4 2048 KBytes 0x28800000 - 0x289FFFFF
RWW partition 5 2048 KBytes 0x28A00000 - 0x28BFFFFF
RWW partition 6 2048 KBytes 0x28C00000 - 0x28DFFFFF
RWW partition 7 2048 KBytes 0x28E00000 - 0x28FFFFFF
RWW partition 8 2048 KBytes 0x29000000 - 0x291FFFFF
RWW partition 9 2048 KBytes 0x29400000 - 0x295FFFFF
EEPROM 512 KBytes 0x29E00000 - 0x29E7FFFF
UTEST 32 KBytes 0x29F80000 - 0x283BFFFF
Boot Code Sector 16 KBytes 0x29FB8000 - 0x29FBBFFF

Evaluation Boards

  • ST SR6X7-EVBC8000P Rev. C evaluation board.
  • ST SR6-EVB001 Rev. A evaluation board.

For further information regarding the SR6-EVB001 Rev. A board proceed to the following page:

Example Application

TBD