Difference between revisions of "ST STM32F2"

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(Internal Flash)
Line 9: Line 9:
 
! Device !! Range !! Total size
 
! Device !! Range !! Total size
 
|-
 
|-
| STM32F2xxxB || 0x0800_0000 - 0x0801_FFFF || 128 KB
+
| STM32F2xxxB || 0x0800_0000 - 0x0801_FFFF || 128 KB
 
|-
 
|-
| STM32F2xxxC || 0x0800_0000 - 0x0803_FFFF || 256 KB
+
| STM32F2xxxC || 0x0800_0000 - 0x0803_FFFF || 256 KB
 
|-
 
|-
| STM32F2xxxE || 0x0800_0000 - 0x0807_FFFF || 512 KB
+
| STM32F2xxxE || 0x0800_0000 - 0x0807_FFFF || 512 KB
 
|-
 
|-
| STM32F2xxxF || 0x0800_0000 - 0x080B_FFFF || 768 KB
+
| STM32F2xxxF || 0x0800_0000 - 0x080B_FFFF || 768 KB
 
|-
 
|-
| STM32F2xxxG || 0x0800_0000 - 0x080F_FFFF || 512 KB
+
| STM32F2xxxG || 0x0800_0000 - 0x080F_FFFF || 1024 KB
 
|-
 
|-
 
| All (opt. bytes) || 0x1FFF_C000 - 0x1FFF_C00F || 16 bytes
 
| All (opt. bytes) || 0x1FFF_C000 - 0x1FFF_C00F || 16 bytes

Revision as of 11:53, 21 November 2022

This article describes device specifics of the ST STM32F2 series devices. The STM32F2 devices are Cortex-M3 based MCUs with low-power functionality.

Internal Flash

The following flash regions are supported by J-Link.

Device Range Total size
STM32F2xxxB 0x0800_0000 - 0x0801_FFFF 128 KB
STM32F2xxxC 0x0800_0000 - 0x0803_FFFF 256 KB
STM32F2xxxE 0x0800_0000 - 0x0807_FFFF 512 KB
STM32F2xxxF 0x0800_0000 - 0x080B_FFFF 768 KB
STM32F2xxxG 0x0800_0000 - 0x080F_FFFF 1024 KB
All (opt. bytes) 0x1FFF_C000 - 0x1FFF_C00F 16 bytes

Reset

For the STM32F2 devices, the Cortex-M default reset strategy is used.

Debug specific

  • If no connection can be established the J-Link will try to connect to the device via a connect under reset.
  • On connect, some DBGMCU registers will be written to
    • freeze the watchdogs during halt to prevent unintended resets while debugging.
    • prevent the debug connection from breaking after the CPU enters deepsleep.
  • When closing the J-Link connection, the DBGMCU registers are reset.

Securing/unsecuring the device

Please refer to the related article here.