Difference between revisions of "STM32MP15x"
(Created page with "__TOC__ = Overview = The STM32MP15x is a heterogeneous dual-core MCU with a Cortex-M4 and one or two Cortex-A7 cores. = Supported QSPI modes = Currently, J-Link supports ''...")
Revision as of 17:06, 11 September 2019
The STM32MP15x is a heterogeneous dual-core MCU with a Cortex-M4 and one or two Cortex-A7 cores.
Supported QSPI modes
Currently, J-Link supports Dual QSPI Flash-Mode and Single QSPI Flashbank(Bank 1 or Bank2) programming.
Default QSPI Pin mapping
|Port||Pin||Pin Function||Alt Func|
WARNING: The QSPI programming in this device is done through AP - Cortex-M4. In order to allow J-Link to communicate with the Cortex-M4 AP the STM32MP1xx needs to be set in "Engineering Boot Mode".
NOTE: If you wish to use a QSPI GPIO configuration different than the default provided one, please get in contact withSEGGER Support.