Difference between revisions of "ST STM32G0"
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| + | Currently, only dual-bank mode is supported for internal flash. |
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| + | As a workaround, the device with doubled flash size can be selected if available, e.g. STM32G0B1RE instead of STM32G0B1RC. |
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== Reset == |
== Reset == |
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Latest revision as of 11:00, 11 March 2024
This article describes device specifics of the ST STM32G0 series devices. The STM32G0 devices are Cortex-M0 based MCUs with low-power functionality.
Contents
Flash
The following flash regions are supported by J-Link.
| Main flash memory | ||
|---|---|---|
| Device | Range | Total size |
| STM32G0xxx4 | 0x0800_0000 - 0x0800_3FFF | 16 KB |
| STM32G0xxx6 | 0x0800_0000 - 0x0800_7FFF | 32 KB |
| STM32G0xxx8 | 0x0800_0000 - 0x0800_FFFF | 64 KB |
| STM32G0xxxB | 0x0800_0000 - 0x0801_FFFF | 128 KB |
| STM32G0xxxC | 0x0800_0000 - 0x0803_FFFF | 256 KB |
| STM32G0xxxE | 0x0800_0000 - 0x0807_FFFF | 512 KB |
| Option bytes[1] | ||
| STM32G0x0 | 0x1FFF_7800 - 0x1FFF_785F | 96 bytes |
| STM32G0x1 | 0x1FFF_7800 - 0x1FFF_787F | 128 bytes |
- ↑ See: Option byte programming
Currently, only dual-bank mode is supported for internal flash. As a workaround, the device with doubled flash size can be selected if available, e.g. STM32G0B1RE instead of STM32G0B1RC.
Reset
For the STM32G0 devices, the Cortex-M default reset strategy is used.
Debug specific
Please refer to the generic STM32 article.
Option byte programming
Please refer to the generic STM32 article.
Securing/unsecuring the device
Please refer to the generic STM32 article.
