Difference between revisions of "SiFive E21"
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Revision as of 10:50, 26 May 2021
The SiFive E21 is a 32-bit (RV32) core of the SiFive E2 series cores, designed by SiFive.
Contents
Minimum required J-Link software version
The E21 and E21ARTY device selection are supported since V7.22 of the J-Link software.
E21ARTY device selection
The E21ARTY is a special device that can be selected for J-Link. It selects the standard SiFive E21 that is implemented for the sample bitstream as part of the SiFive E21 Standard Core Dev Kit. Device specifics include:
- Memory map
- Flash banks
As the E21 is a customizable core, the E21ARTY selection may not be appropriate for customized cores but for the standard one running on the ARTY-100T FPGA evaluation board only.
RTT support
As the core does not support System Bus Access (SBA), RTT is not supported for this core.
HSS access
As the core does not support System Bus Access (SBA), HSS is not supported for this core.
