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- 17:21, 27 February 2024 GigaDevice GD32F310C-EVAL (hist) [1,080 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32F310C-EVAL evaluation board.<br> 450px == Preparing f...")
- 16:54, 27 February 2024 GigaDevice GD32350C-START (hist) [1,095 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32350C-START evaluation board.<br> 450px == Preparing fo...")
- 15:28, 27 February 2024 GigaDevice GD32330C-START (hist) [1,084 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32330C-START evaluation board.<br> 450px == Preparing fo...")
- 14:39, 27 February 2024 GigaDevice GD32F310F-START (hist) [1,086 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32F310F-START evaluation board.<br> 450px == Preparin...")
- 13:33, 27 February 2024 GigaDevice GD32F303B-START (hist) [1,120 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Prepar...")
- 10:27, 27 February 2024 GigaDevice GD32F4 (hist) [2,164 bytes] Torben.scharping (talk | contribs) (Created page with "The GigaDevice GD32F4 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor. __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggert...")
- 16:43, 23 February 2024 NXP iMX6SX SABRE (hist) [864 bytes] Matthias (talk | contribs) (Created page with "__TOC__ This article describes specifics for the NXP iMX6SX SABRE evaluation board.<br> 450px == Preparing for J-Link == *Connect the J-Link to...")
- 13:44, 22 February 2024 GigaDevice GD32F3 (hist) [2,236 bytes] Torben.scharping (talk | contribs) (Created page with "The GigaDevice GD32F3 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor. __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggert...")
- 10:51, 22 February 2024 Flasher SECURE/How to configure a TELP for STM32Gxxx with user-defined SECxR values (hist) [10,087 bytes] Peter (talk | contribs) (Created page with "The STM32G range of ST's Cortex-M microcontrollers has a number of security features to protect intellectual property (IP). As some of these features may conflict with each ot...") originally created as "How to configure a TELP for STM32Gxxx, with user-defined SECxR values?"
- 17:20, 21 February 2024 Flasher SECURE (hist) [293 bytes] Peter (talk | contribs) (Created page with "The SEGGER Flasher Secure family is a high performance production programmer for secure authorized programming. == How to ... == *How to configure a TELP for STM32Gxxx, wit...")
- 15:53, 19 February 2024 How to optimize a Firmware for minimal Size (hist) [15,230 bytes] Johannes (talk | contribs) (Created page with "Toolchains offer various options to reduce firmware size and require less Flash memory. There are additional tweaks which can be applied in code to remove unused functionality...")
- 09:05, 15 February 2024 GigaDevice GD32 (hist) [7,934 bytes] Torben.scharping (talk | contribs) (Created page with "The GD32 Cortex-M Series is family of devices by GigaDevice Semiconductor Inc. The following article contains information which applies to all members of the product family (e...")
- 17:05, 14 February 2024 Use ST-Link in Embedded Studio (hist) [1,257 bytes] Nino (talk | contribs) (Created page with "This article will explain how a ST-Link can be used for debugging in Embedded Studio. == Minimum Requirements == * Embedded Studio V8.10 or later * ST-Link V2 or later * STM...")
- 12:44, 9 February 2024 NXP FRDM-MCXN236 (hist) [939 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the NXP X-FRDM-MCXN236 evaluation board.<br> 450px == Preparing for J-Link == *Con...") originally created as "NXP X-FRDM-MCXN236"
- 12:43, 9 February 2024 NXP MCXN11 (hist) [876 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ The '''NXP MCXN11''' are single core Arm Cortex-M33 microprocessors. ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Si...")
- 10:35, 8 February 2024 ArteryTek AT32A40x (hist) [1,382 bytes] Torben.scharping (talk | contribs) (Created page with "Artery AT32F40x are Cortex-M4 based MCUs __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | In...") originally created as "Artery AT32A40x"
- 10:05, 8 February 2024 ArteryTek AT-START-A403A (hist) [1,195 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-FA403A evaluation board.<br> 450px == Preparing for...") originally created as "Artery AT-START-A403A"
- 17:24, 7 February 2024 ArteryTek AT-START-F407 (hist) [1,194 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F407 evaluation board.<br> 450px == Preparing for J-Lin...") originally created as "Artery AT-START-F407"
- 14:34, 7 February 2024 ArteryTek AT-START-F403A (hist) [1,203 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F403 evaluation board.<br> 450px == Preparing for J-Li...") originally created as "Artery AT-START-F403"
- 08:40, 7 February 2024 Geehy G32A1xx (hist) [1,529 bytes] Arne.kulinna (talk | contribs) (Created page with "__TOC__ The Geehy G32A1xx are Cortex-M4 based MCUs. Following information also applies for devices of the Geehy G32A1xx family. ==Internal Flash== ===Supported Regions=== The...")
- 08:35, 7 February 2024 Geehy G32A1145 EVAL (hist) [633 bytes] Arne.kulinna (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Geehy (Previously known as APEXMIC) G32A1145 EVAL evaluation board. It can be used to test & verify G32A1xx device support....")
- 07:54, 7 February 2024 HPMicro HPM6800EVK (hist) [643 bytes] Arne.kulinna (talk | contribs) (Created page with "__TOC__ This article describes specifics for the HPMicro HPM6800EVK evaluation board. It can be used to test & verify HPM68xx device support. File:HPMicro_HPM6800EVK.jpg|4...")
- 07:44, 7 February 2024 HPMicro HPM68 (hist) [780 bytes] Arne.kulinna (talk | contribs) (Created page with "__TOC__ The '''HPMicro HPM68xx''' device series are RISC-V based 32-bit microcontrollers. ==SPI flash support== J-Link supports SPI-flashes with HPM68xx through the XPI-API....")
- 14:28, 5 February 2024 HPMicro (hist) [1,013 bytes] Arne.kulinna (talk | contribs) (Created page with "'''Shanghai Xianji Semiconductor Technology Co., Ltd.''' is a silicon vendor with devices supported by J-Link. This article collects information about those supported device f...")
- 18:29, 2 February 2024 LAN adapter support (hist) [376 bytes] Souhail (talk | contribs) (Created page with "SEGGER's emUSB-Host LAN adapter support a LAN driver which suits the emNet driver requirements. This driver comes with different LAN adapter support which are called sub LAN d...")
- 09:14, 2 February 2024 ArteryTek AT-START-WB415 (hist) [1,169 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-WB413 evaluation board.<br> 450px == Preparing for J...") originally created as "Artery AT-START-WB413"
- 09:11, 2 February 2024 ArteryTek AT32WB41x (hist) [896 bytes] Torben.scharping (talk | contribs) (Created page with "Artery AT32WB413 are Cortex-M4 based MCUs __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | I...") originally created as "Artery AT32WB413"
- 11:02, 26 January 2024 ArteryTek AT-START-F413 (hist) [1,207 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F413 evaluation board.<br> 450px == Preparing for J-Lin...") originally created as "Artery AT-START-F413"
- 11:50, 25 January 2024 ArteryTek AT-START-F402 (hist) [1,210 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F405 evaluation board.<br> 450px == Preparing for J-Li...") originally created as "Artery AT-START-F402"
- 11:19, 25 January 2024 ArteryTek AT32F40x (hist) [2,381 bytes] Torben.scharping (talk | contribs) (Created page with "Artery AT32F43x are Cortex-M4 based MCUs __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | In...") originally created as "Artery AT32F40x"
- 08:31, 25 January 2024 ArteryTek AT-START-F405 (hist) [1,221 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F405 evaluation board.<br> 450px == Preparing for J-Li...") originally created as "Artery AT-START-F405"
- 11:23, 24 January 2024 How to use the SEGGER Toolchain with CMake (hist) [3 bytes] Arne.kulinna (talk | contribs) (Created page with "TBD")
- 15:01, 23 January 2024 ArteryTek AT32F41x (hist) [1,582 bytes] Torben.scharping (talk | contribs) (Created page with "Artery AT32F41x are Cortex-M4 based MCUs __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | In...") originally created as "Artery AT32F41x"
- 14:44, 23 January 2024 ArteryTek AT-START-F415 (hist) [1,202 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F415 evaluation board.<br> 450px == Preparing for J-Li...") originally created as "Artery AT-START-F415"
- 09:31, 23 January 2024 ArteryTek AT-START-F423 (hist) [1,206 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F423 evaluation board.<br> 450px == Preparing for J-Link...") originally created as "Artery AT-START-F423"
- 17:54, 22 January 2024 ArteryTek AT-START-F421 (hist) [1,124 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F421 evaluation board.<br> 450px == Preparing for J-Link...") originally created as "Artery AT-START-F421"
- 17:41, 22 January 2024 ArteryTek AT32F42x (hist) [1,146 bytes] Torben.scharping (talk | contribs) (Created page with "Artery AT32F43x are Cortex-M4 based MCUs __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | In...") originally created as "Artery AT32F42x"
- 16:00, 22 January 2024 Scalable Vector Graphics (SVG) (hist) [2,904 bytes] BiancaS (talk | contribs) (Created page with "Scalable Vector Graphics (SVG) is an XML-based vector image format developed by the World Wide Web Consortium (W3C). It serves as a versatile solution for representing two-dim...") originally created as "Scalable Vector Graphic (SVG)"
- 15:07, 19 January 2024 ArteryTek AT-START-F425 (hist) [1,195 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ 2This article describes specifics for the Artery AT-START-F435 evaluation board.<br> 450px == Preparing for J-L...") originally created as "Artery AT-START-F425"
- 11:52, 18 January 2024 ArteryTek AT-START-F435 (hist) [1,174 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F437 evaluation board.<br> 450px == Preparing for J-Lin...") originally created as "Artery AT-START-F435"
- 10:49, 18 January 2024 ArteryTek AT-START-F437 (hist) [1,192 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Prepar...") originally created as "Artery AT-START-F437"
- 11:51, 17 January 2024 Renesas RZ/G3S SMARC (hist) [3 bytes] Erik (talk | contribs) (Created page with "TBD")
- 11:50, 17 January 2024 Renesas RZ/G3S (hist) [2,743 bytes] Erik (talk | contribs) (Created page with "__TOC__ The Renesas RZ/G3S series includes includes a Cortex-A55 as well as two Cortex-M33 cores. ==Flash Banks== ===Internal Flash=== The device does not feature internal fla...")
- 10:19, 15 January 2024 Migrating from Embedded Studio V7 to V8 (hist) [1,650 bytes] Nino (talk | contribs) (Created page with "Embedded Studio projects created with V7 should work without further modification needed in V8 as well. However it is possible that some global IDE settings or installed CPU...")
- 10:08, 15 January 2024 GigaDevice GD32VW553K-START (hist) [977 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32VW553K-START evaluation board.<br> 450px == Prepari...")
- 08:35, 11 January 2024 Toshiba (hist) [703 bytes] Torben.scharping (talk | contribs) (Created page with "'''Toshiba''' is a silicon vendor with devices supported by J-Link. <br> This article collects information about those supported device families. == General information on To...") originally created as "Toschiba"
- 16:05, 10 January 2024 Toshiba TMPM4K (hist) [823 bytes] Torben.scharping (talk | contribs) (Created page with "The '''[SiliconVendor] [DeviceFamily]''' are [SHORT_DESCRIPTION] __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size |...")
- 12:01, 10 January 2024 NXP MCX-A14X-EVK (hist) [908 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the NXP MCX-A14X-EVK evaluation board.<br> 450px == Preparing for J-Link == *Con...")
- 11:56, 10 January 2024 NXP MCXA10 (hist) [857 bytes] Torben.scharping (talk | contribs) (Created page with "The '''NXP MCXA1''' are [SHORT_DESCRIPTION] __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- |...")
- 01:29, 2 January 2024 ASCII (hist) [1,027 bytes] Rolf (talk | contribs) (Created page with "Category:Knowledge Base ASCII is a 7-bit character encoding scheme. ASCII is short for American Standard Code for Information Interchange. It defines all characters used i...")