Difference between revisions of "Syntacore SCR1"

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(Available eval boards)
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* Release: V6.42g or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack Download latest release])
 
* Release: V6.42g or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack Download latest release])
 
* Beta: V6.43d or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPackBeta Download latest beta])
 
* Beta: V6.43d or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPackBeta Download latest beta])
 
   
 
= Example projects =
 
= Example projects =

Revision as of 17:25, 28 February 2019

The Syntacore SCR1 is a RISC-V based device which is supported by J-Link

J-Link support

Hardware requirements

Please note that a current J-Link model is needed for RISC-V support: Overview

Software requirements

J-Link supports the Syntacore SCR1 since the following J-Link software versions:

Example projects

Embedded Studio

The following example project requires SEGGER Embedded Studio for RISC-V. It downloads a simple Cnt++ loop into the 64 TCM @0xF0000000

Note: Please make sure to install SEGGER Embedded Studio first and after that the J-Link software package. At the end of the software package installation, you will be asked if you want to update SEGGER Embedded Studio to the latest J-Link SW. Please perform the update.

Available eval boards

The following eval boards are available: