Difference between revisions of "Syntacore SCR1 SDK Arty"
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= Software requirements = |
= Software requirements = |
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+ | [https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack V6.44] or later is required to support the Syntacore SCR1. Older versions will not work. |
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− | J-Link supports the Syntacore SCR1 since the following J-Link software versions: |
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− | * Release: V6.42g or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack Download latest release]) |
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− | * Beta: V6.43d or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPackBeta Download latest beta]) |
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= Preparing for J-Link = |
= Preparing for J-Link = |
Revision as of 18:24, 1 March 2019
This article describes specifics for the Syntacore SCR1 Arty SDK.
J-Link support
Hardware requirements
Please note that a current J-Link model is needed for RISC-V support: Overview
Software requirements
V6.44 or later is required to support the Syntacore SCR1. Older versions will not work.
Preparing for J-Link
The Syntacore SCR1 Arty SDK does not come with a standard debug connector but populates the debug JTAG signals on a custom connector. Therefore, it needs to be manually wired in case J-Link shall be connected to it.
In the following, it is described how the pins of connector JD on the ARTY board needs to be wired to J-Link. All pins of the J-Link side refer to the standard 0.1" 20-pin connector of J-Link.
Pin JD (ARTY) | Pin J-Link | Description |
---|---|---|
3 | 3 | nTRST |
4 | 9 | TCK |
7 | 13 | TDO |
8 | 5 | TDI |
9 | 15 | nRESET |
10 | 7 | TMS |
11 | 4 | GND |
12 | 1 | VCC/VTref |
Note: The pins on the JD connector are numbered as follows:
6 | 5 | 4 | 3 | 2 | 1 |
12 | 11 | 10 | 9 | 8 | 7 |