Difference between revisions of "ArteryTek AT32WB41x"
(One intermediate revision by one other user not shown) | |||
Line 1: | Line 1: | ||
+ | [[Category:Device families]] |
||
ArteryTek AT32WB41x are Cortex-M4 based MCUs |
ArteryTek AT32WB41x are Cortex-M4 based MCUs |
||
__TOC__ |
__TOC__ |
||
Line 24: | Line 25: | ||
==Evaluation Boards== |
==Evaluation Boards== |
||
− | *[[ArteryTek_AT-START-WB415|ArteryTek AT-START-WB415]] |
+ | *[[ArteryTek_AT-START-WB415|ArteryTek AT-START-WB415]]1 |
− | |||
==Example Application== |
==Example Application== |
Latest revision as of 15:17, 15 May 2024
ArteryTek AT32WB41x are Cortex-M4 based MCUs
Contents
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Internal flash | 0x08000000 | 256 KB | |
User data | 0x1FFFF800 | 1 KB |
Watchdog Handling
- The watchdog is fed during flash programming.
Device Specific Handling
Connect
- On Connect, protection level is checked. For further information regarding this, please click here.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.