Difference between revisions of "GigaDevice GD32170C-START"
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== Preparing for J-Link == |
== Preparing for J-Link == |
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− | *Connect the J-Link to |
+ | *Connect the J-Link to this pins: |
+ | {| class="seggertable" |
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− | *Power the board via CN2. |
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+ | |- |
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+ | ! J-Link Pin || Connector !! Pin || Name |
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+ | |- |
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+ | | VTref || JP1 || 20 || +5V |
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+ | |- |
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+ | | GND || JP1 || 19 || GND |
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+ | |- |
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+ | | TMS/SWDIO || JP2 || 4 || PA13 |
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+ | |- |
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+ | | TCK/SWCLK || JP2 || 7 || PA14 |
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+ | |} |
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+ | *Power the board via CN100. |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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[[File:GigaDevice_GD32F170C8_GD32170C-START_connect.png|400px]] |
[[File:GigaDevice_GD32F170C8_GD32170C-START_connect.png|400px]] |
Latest revision as of 17:23, 14 May 2024
This article describes specifics for the GigaDevice GD32170C-START evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | JP1 | 20 | +5V |
GND | JP1 | 19 | GND |
TMS/SWDIO | JP2 | 4 | PA13 |
TCK/SWCLK | JP2 | 7 | PA14 |
- Power the board via CN100.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the GigaDevice GD32170C-START.
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V8.10b
- Hardware: GigaDevice GD32170C-START
- Link: File:GigaDevice GD32F170C8 TestProject ES V810b.zip