Difference between revisions of "GigaDevice GD32A4"
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! Flash Bank || Base address !! Size || J-Link Support |
! Flash Bank || Base address !! Size || J-Link Support |
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− | | Main flash |
+ | | Main flash || 0x08000000 || Up to 3 MB || style="text-align:center;"| {{YES}} |
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+ | | Option Byte Bank 0 || 0x1FFFC000|| 16 B || style="text-align:center;"| {{NO}} |
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− | | |
+ | | Option Byte Bank 1 || 0x1FFEC000|| 16 B || style="text-align:center;"| {{NO}} |
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− | | |
+ | | OTP Bytes || 0x1FFF7800 || 512 B || style="text-align:center;"| {{NO}} |
− | |- |
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− | | Option Byte 1 || 0x40022068|| 4 B || style="text-align:center;"| {{YES}} |
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− | |- |
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− | | OTP Bytes || 0x1FFF7000 || 1 KB || style="text-align:center;"| {{NO}} |
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− | <br> |
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− | {{Note|After changing Option Byte 1, a power on reset has to be performed.}} |
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− | ==ECC RAM== |
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− | In order to prevent errors when reading first time, the DLL initializes the first 24Kb of RAM |
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− | starting at 0x2000 0000. |
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==Watchdog Handling== |
==Watchdog Handling== |
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==Evaluation Boards== |
==Evaluation Boards== |
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− | *[[ |
+ | *[[GigaDevice_GD32A490I-EVAL|GigaDevice GD32A490I-EVAL]] |
==Example Application== |
==Example Application== |
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− | *[[ |
+ | *[[GigaDevice_GD32A490I-EVAL#Example_Project | GigaDevice GD32A490I-EVAL]] |
Latest revision as of 08:39, 25 June 2024
The GD32A49x series are 32-bit general-purpose microcontrollers based on the Arm® Cortex®-M4 processor.
Contents
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Main flash | 0x08000000 | Up to 3 MB | |
Option Byte Bank 0 | 0x1FFFC000 | 16 B | |
Option Byte Bank 1 | 0x1FFEC000 | 16 B | |
OTP Bytes | 0x1FFF7800 | 512 B |
Watchdog Handling
- The device does have 2 watchdogs.
- The watchdogs are fed during flash programming.
Device Specific Handling
Connect
- On Connect, protection level is checked. For further information regarding this, please click here.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.