Difference between revisions of "GigaDevice GD32A4"

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(Internal Flash)
 
(3 intermediate revisions by the same user not shown)
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! Flash Bank || Base address !! Size || J-Link Support
 
! Flash Bank || Base address !! Size || J-Link Support
 
|-
 
|-
| Main flash Bank 0 || 0x08000000 || Up to 1 MB || style="text-align:center;"| {{YES}}
+
| Main flash || 0x08000000 || Up to 3 MB || style="text-align:center;"| {{YES}}
 
|-
 
|-
| Main flash Bank 1 || 0x08100000 || Up to 2 MB || style="text-align:center;"| {{YES}}
+
| Option Byte Bank 0 || 0x1FFFC000|| 16 B || style="text-align:center;"| {{NO}}
 
|-
 
|-
| Data flash || 0x08800000 || up to 64 KB || style="text-align:center;"| {{YES}}
+
| Option Byte Bank 1 || 0x1FFEC000|| 16 B || style="text-align:center;"| {{NO}}
 
|-
 
|-
| Option Byte 0 || 0x1FFFF800 || 24 B || style="text-align:center;"| {{YES}}
+
| OTP Bytes || 0x1FFF7800 || 512 B || style="text-align:center;"| {{NO}}
|-
 
| Option Byte 1 || 0x40022068|| 4 B || style="text-align:center;"| {{YES}}
 
|-
 
| OTP Bytes || 0x1FFF7000 || 1 KB || style="text-align:center;"| {{NO}}
 
 
|}
 
|}
<br>
 
{{Note|After changing Option Byte 1, a power on reset has to be performed.}}
 
 
==ECC RAM==
 
In order to prevent errors when reading first time, the DLL initializes the first 24Kb of RAM
 
starting at 0x2000 0000.
 
   
 
==Watchdog Handling==
 
==Watchdog Handling==
Line 41: Line 31:
   
 
==Evaluation Boards==
 
==Evaluation Boards==
*[[GigaDevice_GD32A503-EVAL|GigaDevice GD32A503-EVAL]]
+
*[[GigaDevice_GD32A490I-EVAL|GigaDevice GD32A490I-EVAL]]
   
 
==Example Application==
 
==Example Application==
*[[GigaDevice_GD32A503-EVAL#Example_Project | GigaDevice GD32A503-EVAL]]
+
*[[GigaDevice_GD32A490I-EVAL#Example_Project | GigaDevice GD32A490I-EVAL]]

Latest revision as of 08:39, 25 June 2024

The GD32A49x series are 32-bit general-purpose microcontrollers based on the Arm® Cortex®-M4 processor.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Main flash 0x08000000 Up to 3 MB YES.png
Option Byte Bank 0 0x1FFFC000 16 B NO.png
Option Byte Bank 1 0x1FFEC000 16 B NO.png
OTP Bytes 0x1FFF7800 512 B NO.png

Watchdog Handling

  • The device does have 2 watchdogs.
  • The watchdogs are fed during flash programming.

Device Specific Handling

Connect

  • On Connect, protection level is checked. For further information regarding this, please click here.

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application