Difference between revisions of "Toshiba TX04"
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[[Category:Device families]] |
[[Category:Device families]] |
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| − | The '''Toshiba TX04'' are motor control microprocessors based on Cortex-M4 |
+ | The '''Toshiba TX04''' are motor control microprocessors based on Cortex-M4 |
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| Code Flash || 0x00000000 || Up to 1024 KB || style="text-align:center;"| {{YES}} |
| Code Flash || 0x00000000 || Up to 1024 KB || style="text-align:center;"| {{YES}} |
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| − | ==ECC RAM== |
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| − | *The M471 devices have parity RAM. J-Link initializes it on connect. |
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==Watchdog Handling== |
==Watchdog Handling== |
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| − | * |
+ | *No watchdog handling implemented. |
==Device Specific Handling== |
==Device Specific Handling== |
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==Evaluation Boards== |
==Evaluation Boards== |
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| − | *[[WikiTemplateEvalBoard|[SiliconVendor] [EvalBoardName]]] |
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==Example Application== |
==Example Application== |
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| − | *[[WikiTemplateEvalBoard#Example_Project | [SiliconVendor] [EvalBoardName]]] |
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Latest revision as of 11:02, 2 July 2024
The Toshiba TX04 are motor control microprocessors based on Cortex-M4
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Code Flash | 0x00000000 | Up to 1024 KB | 
|
Watchdog Handling
- No watchdog handling implemented.
Device Specific Handling
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
