Difference between revisions of "e-peas EDMS105N EVK"

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(Created page with "__TOC__ This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Prepar...")
 
(Preparing for J-Link)
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__TOC__
 
__TOC__
   
This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.<br>
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This article describes specifics for the e-peas EDMS105N_EVK evaluation board.<br>
 
'''[PICTURE OF BOARD]'''
 
'''[PICTURE OF BOARD]'''
 
[[File:VENDOR_BOARDNAME.jpg|450px]]
 
[[File:VENDOR_BOARDNAME.jpg|450px]]
   
 
== Preparing for J-Link ==
 
== Preparing for J-Link ==
*Connect the J-Link to ......
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*Connect the J-Link to the following Pins:
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** GND: CN4.1
*Power the board via........
 
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** VTref: CN5.1
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** SWDIO: JP7.3
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** SWCLK_ JP7.1
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** RESET: JP7.5
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*Power the board via S1.
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
  +
[[File:Epeas_MDNS105N-xxyP_connect.png|400px]]
'''[PICTURE OF CONNECT]'''
 
[[File:VENDOR_DEVICE_CONNECT.PNG|400px]]
 
   
 
== Example Project==
 
== Example Project==
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].<br>It is a simple Hello World sample linked into the internal flash.<br>
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The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the e-peas EDMS105N_EVK.<br>It is a simple Hello World sample linked into the internal flash.<br>
 
====SETUP====
 
====SETUP====
*J-Link software: V6.74
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*J-Link software: V7.88k
*Embedded Studio: V4.52b
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*Embedded Studio: V6.34
*Hardware: [SiliconVendor] [EvalBoardName]
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*Hardware: e-peas EDMS105N_EVK
*Link: [[File:VENDOR_DEVICENAME_TestProject_ES_V452b.zip]]
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*Link: [[File:Epeas_EDMS105N_TestProject_ES_V634.zip]]

Revision as of 16:05, 29 June 2023

This article describes specifics for the e-peas EDMS105N_EVK evaluation board.
[PICTURE OF BOARD] 450px

Preparing for J-Link

  • Connect the J-Link to the following Pins:
    • GND: CN4.1
    • VTref: CN5.1
    • SWDIO: JP7.3
    • SWCLK_ JP7.1
    • RESET: JP7.5
  • Power the board via S1.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Epeas MDNS105N-xxyP connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the e-peas EDMS105N_EVK.
It is a simple Hello World sample linked into the internal flash.

SETUP