Difference between revisions of "NXP RD-RW616-BGA IPA-2A/1A"
(→Preparing for J-Link) |
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* Jumper JP1 must be set in order to use J-Link |
* Jumper JP1 must be set in order to use J-Link |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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| + | [[File:NXP_RD-RW612-BGA_RW612EV_connect.png|400px]] |
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| − | '''[PICTURE OF CONNECT]''' |
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| − | [[File:VENDOR_DEVICE_CONNECT.PNG|400px]] |
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== Example Project== |
== Example Project== |
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Revision as of 15:42, 24 August 2023
This article describes specifics for the NXP RD-RW616-BGA_IPA-2A/1A evaluation board.
Preparing for J-Link
- Connect the J-Link to P2
- Power the board via J1
- Jumper JP1 must be set in order to use J-Link
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP RD-RW616-BGA_IPA-2A/1A.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V6.74
- Embedded Studio: V4.52b
- Hardware: NXP RD-RW616-BGA_IPA-2A/1A
- Link: File:VENDOR DEVICENAME TestProject ES V452b.zip
