Difference between revisions of "NXP RD-RW616-BGA IPA-2A/1A"

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(Preparing for J-Link)
(SETUP)
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The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP RD-RW616-BGA_IPA-2A/1A.<br>It is a simple Hello World sample linked into the internal flash.<br>
 
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP RD-RW616-BGA_IPA-2A/1A.<br>It is a simple Hello World sample linked into the internal flash.<br>
 
====SETUP====
 
====SETUP====
*J-Link software: V6.74
+
*J-Link software: V7.92c
*Embedded Studio: V4.52b
+
*Embedded Studio: V7.20
 
*Hardware: NXP RD-RW616-BGA_IPA-2A/1A
 
*Hardware: NXP RD-RW616-BGA_IPA-2A/1A
*Link: [[File:VENDOR_DEVICENAME_TestProject_ES_V452b.zip]]
+
*Link: [[File:NXP_RW61x_TestProject_ES_7V20.zip]]

Revision as of 15:44, 24 August 2023

This article describes specifics for the NXP RD-RW616-BGA_IPA-2A/1A evaluation board.
NXP RD-RW612-BGA RW612EV board.jpg

Preparing for J-Link

  • Connect the J-Link to P2
  • Power the board via J1
  • Jumper JP1 must be set in order to use J-Link
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

NXP RD-RW612-BGA RW612EV connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP RD-RW616-BGA_IPA-2A/1A.
It is a simple Hello World sample linked into the internal flash.

SETUP